0000000000237061
AUTHOR
Alejandro Martínez
Cutinases: Characteristics and Insights in Industrial Production
Cutinases (EC 3.1.1.74) are serin esterases that belong to the α/β hydrolases superfamily and present in the Ser-His-Asp catalytic triad. They show characteristics between esterases and lipases. These enzymes hydrolyze esters and triacylglycerols and catalyze esterification and transesterification reactions. Cutinases are synthesize by plant pathogenic fungi, but some bacteria and plants have been found to produce cutinases as well. In nature they facilitate a pathogen’s invasion by hydrolyzing the cuticle that protects plants, but can be also used for saprophytic fungi as a way to nourish themselves. Cutinases can hydrolyze a wide range of substrates like esters, polyesters, triacylglycero…
Deadline-based QoS Algorithms for High-performance Networks
Quality of service (QoS) is becoming an attractive feature for high-performance networks and parallel machines because it could allow a more efficient use of resources. Deadline-based algorithms can provide powerful QoS provision. However, the cost associated with keeping ordered lists of packets makes them impractical for high-performance networks. In this paper, we explore how to adapt efficiently the earliest deadline first family of algorithms to the high-speed networks environments. The results show excellent performance using just two virtual channels, FIFO queues, and a cost feasible with today's technology.
Efficient Switches with QoS Support for Clusters
Current interconnect standards providing hardware support for quality of service (QoS) consider up to 16 virtual channels (VCs) for this purpose. However, most implementations do not offer so many VCs because they increase the complexity of the switch and the scheduling delays. We have shown that this number of VCs can be significantly reduced, because it is enough to use two VCs for QoS purposes at each switch port. In this paper, we cover the weaknesses of that proposal and, not only we reduce VCs, but we also improve performance due to the flexibility assigning buffer memory.