0000000001090884
AUTHOR
R. Montgomery
The DIRC detectors at the PANDA experiment
PANDA is an experiment at the new FAIR facility at GSI and will, among other physics goals,\ud perform charmonium spectroscopy and search for gluonic excitations using high luminosity antiproton beams up to 15 GeV/c. A high performance particle identification system applying DIRC\ud detectors will allow pion/kaon separation up to 4 GeV/c. A Barrel DIRC with fused silica radiator bars or plates will surround the target at a radial distance of 48 cm and will cover a polar\ud angle range of 22 to 140 degrees; a novel Endcap Disk DIRC built of a segmented fused silica\ud disk of 210 cm diameter will be installed in the forward region to cover the polar angles from\ud 5 to 22 degrees. The design…
New developments of the PANDA Disc DIRC detector
The DIRC principle (Detection of Internally Reflected Cherenkov light) allows a very compact\ud approach for particle identification detectors. The PANDA detector at the future FAIR facility at\ud GSI will use a Barrel-DIRC for the central region and a Disc DIRC for the forward angular region\ud between 5◦\ud and 22◦\ud . It will be the first time that a Disc DIRC is used in a high performance 4π\ud detector. To achieve this aim, different designs and technologies have been evaluated and tested.\ud This article will focus on the mechanical design and integration of the Disc DIRC with respect to\ud the PANDA environment.
Frontend Electronics for high-precision single photo-electron timing
The next generation of high-luminosity experiments requires excellent particle identification detectors, which calls for imaging Cherenkov counters with fast electronics to cope with the expected hit rates. A Barrel DIRC will be used in the central region of the Target Spectrometer\ud of the planned PANDA experiment at FAIR. A single photo-electron timing resolution of better\ud than 100 ps RMS is required for the Barrel DIRC to disentangle the complicated patterns created\ud on the image plane. R&D studies have been performed to provide a design based on the TRB3\ud readout using FPGA-TDCs with a typical precision of 10 ps RMS and custom frontend electronics with high-bandwidth pre-amp…