6533b859fe1ef96bd12b8342

RESEARCH PRODUCT

Charge pump phase-locked loop with phase-frequency detector: closed form mathematical model

Nikolay KuznetsovMarat YuldashevRenat YuldashevMikhail BlagovElena KudryashovaOlga KuznetsovaTimur Mokaev

subject

Signal Processing (eess.SP)FOS: Electrical engineering electronic engineering information engineeringElectrical Engineering and Systems Science - Signal Processing

description

Charge pump phase-locked loop with phase-frequency detector (CP-PLL) is an electrical circuit, widely used in digital systems for frequency synthesis and synchronization of the clock signals. In this paper a non-linear second-order model of CP-PLL is rigorously derived. The obtained model obviates the shortcomings of previously known second-order models of CP-PLL. Pull-in time is estimated for the obtained second-order CP-PLL.

yearjournalcountryeditionlanguage
2019-01-05
https://dx.doi.org/10.48550/arxiv.1901.01468