6533b86efe1ef96bd12cbc9e

RESEARCH PRODUCT

Optimization of Application-Specific L1 Cache Translation Functions of the LEON3 Processor

Marco PlatznerNam HoPaul Kaufmann

subject

Hardware_MEMORYSTRUCTURESComputer scienceCPU cachemedia_common.quotation_subjectApplication specificCacheParallel computingTranslation (geometry)Function (engineering)MetaheuristicEnergy (signal processing)Block (data storage)media_common

description

Reconfigurable caches offer an intriguing opportunity to tailor cache behavior to applications for better run-times and energy consumptions. While one may adapt structural cache parameters such as cache and block sizes, we adapt the memory-address-to-cache-index mapping function to the needs of an application. Using a LEON3 embedded multi-core processor with reconfigurable cache mappings, a metaheuristic search procedure, and Mibench applications, we show in this work how to accurately compare non-deterministic performances of applications and how to use this information to implement an optimization procedure that evolves application-specific cache mappings.

yearjournalcountryeditionlanguage
2020-08-01
https://doi.org/10.1007/978-3-030-49345-5_28