Search results for " Circuits"
showing 10 items of 187 documents
Joint Topology and Radio Resource Optimization for Device-to-Device Based Mobile Social Networks
2018
In this paper, we consider a joint topology and radio resource optimization for device-to-device (D2D) based mobile social networks. The considered social network is an interest based which is modeled as a d -intersection binomial random graph. The Radio network is also modeled as a random graph where an edge between any two distinct nodes is activated with a certain probability that is equivalent to the probability of exceeding a certain signal to interference ratio for that link. The entire network is then modeled as an intersection graph between the social and radio induced graphs. Thereafter, network topology is optimized such that enabled social edges satisfy certain network connectivi…
An exact algorithm for preventive maintenance planning of series-parallel systems
2009
Reliability is a meaningful parameter in assessing the performance of systems such as chemical processing facilities, power plant, aircrafts, ships, etc. In the literature, reliability optimization is widely considered during the system design phase and it is carried out by an opportune selection of both system components and redundancy. On the other hand, the problem of maintaining a required level of reliability by an opportune maintenance policy has been poorly examined. The paper tackles this problem for a system whose major components can be maintained only during a planned system downtime. An exact algorithm is proposed in order to single out the set of components that must be maintai…
An Adaptive Routing Mechanism for Efficient Resource Discovery in Unstructured P2P Networks
2005
The widespread adoption of large-scale decentralized peer-to-peer (P2P) systems imposes huge challenges on distributed search and routing. Decentralized and unstructured P2P networks are very attractive because they require neither centralized directories, nor precise control over network topology or data placement. However their search mechanisms are extremely unscalable, generating large loads on the network participants. In this paper, to address this major limitation, we propose and evaluate the adoption of an innovative algorithm for routing user queries. The proposed approach aims at dynamically adapting the network topology to peer interests, on the basis of query interactions among …
Network of Concepts and Ideas
2010
We present the results of an experiment designed to investigate the way information is organized and stored in the human brain. In particular, we are using controlled stimuli to reverse engineer the networks of ideas and concepts in order to answer the following questions. (1) Are the networks of ideas and concepts in the human brain invoked by verbal and visual stimuli distinct from each other? The answer appears to be no for the network of ideas and inconclusive for the network of concepts. (2) What is the topology of these networks? Our experimental results show that both are small-world networks, with the network of ideas being random and the network of concepts scale-free.
A Design Methodology for Low-Power MCML Ring Oscillators
2007
In this paper, a low-power design method for MCML based ring oscillators is presented. The proposed method takes into account the parasitic capacitances of the MOS transistors. To validate it, some ring oscillators with different oscillation frequencies were designed in a 0.18 mum CMOS technology. SPICE simulations demonstrate the effectiveness of the design method.
A Novel Fault-Tolerant Routing Technique for Mesh-of-Tree based Network-on-Chip Design
2018
Due to the increase in the number of processing elements in System-on-Chips (SoCs), communication between the cores is becoming complex. A solution to this issue in SoCs gave rise to a new paradigm called Network-on-Chips (NoCs). In NoCs, communication between different cores is achieved using packet based switching techniques. In the deep sub-micron technology, NoCs are more susceptible to different kinds of faults which can be transient, intermittent and permanent. These faults can occur at any component of NoCs. This paper presents a novel Fault-Tolerant Routing (FTR) technique for Mesh-of-Tree (MoT) topology in the presence of router faults. The proposed technique is compared with routi…
Fault Tolerant Routing Methodology for Mesh-of-Tree based Network-on-Chips using Local Reconfiguration
2018
Increase in the processing elements in a System-on- Chip (SoC) has led to an increasing complexity between the cores in the entire network. This communication bottleneck led to rise in the new paradigm called Network-on-Chip (NoC). These NoC are very much susceptible to various types of faults which can be transient, intermittent or permanent. This paper presents a fault-tolerant routing technique which can route the packets from a source to a destination in presence of permanent faults in the leaf routers of Mesh-of-Tree topology where cores are connected. This is achieved by using reconfiguration in the local ports of the leaf routers by inserting multiplexers as a layer between the leaf …
Fault-Tolerant Application-Specific Topology-Based NoC and Its Prototype on an FPGA
2021
Application-Specific Networks-on-Chips (ASNoCs) are suitable communication platforms for meeting current application requirements. Interconnection links are the primary components involved in communication between the cores of an ASNoC design. The integration density in ASNoC increases with continuous scaling down of the transistor size. Excessive integration density in ASNoC can result in the formation of thermal hotspots, which can cause a system to fail permanently. As a result, fault-tolerant techniques are required to address the permanent faults in interconnection links of an ASNoC design. By taking into account link faults in the topology, this paper introduces a fault-tolerant appli…
Flexible Spare Core Placement in Torus Topology based NoCs and its validation on an FPGA
2021
In the nano-scale era, Network-on-Chip (NoC) interconnection paradigm has gained importance to abide by the communication challenges in Chip Multi-Processors (CMPs). With increased integration density on CMPs, NoC components namely cores, routers, and links are susceptible to failures. Therefore, to improve system reliability, there is a need for efficient fault-tolerant techniques that mitigate permanent faults in NoC based CMPs. There exists several fault-tolerant techniques that address the permanent faults in application cores while placing the spare cores onto NoC topologies. However, these techniques are limited to Mesh topology based NoCs. There are few approaches that have realized …
Characterization of the complete fiber network topology of planar fibrous tissues and scaffolds
2010
Understanding how engineered tissue scaffold architecture affects cell morphology, metabolism, phenotypic expression, as well as predicting material mechanical behavior has recently received increased attention. In the present study, an image-based analysis approach that provides an automated tool to characterize engineered tissue fiber network topology is presented. Micro-architectural features that fully defined fiber network topology were detected and quantified, which include fiber orientation, connectivity, intersection spatial density, and diameter. Algorithm performance was tested using scanning electron microscopy (SEM) images of electrospun poly(ester urethane)urea (ES-PEUU) scaffo…