Search results for "Array"

showing 10 items of 1264 documents

Real Time Image Rotation Using Dynamic Reconfiguration

2002

Abstract Field programmable gate array (FPGA) components are widely used nowdays to implement various algorithms, such as digital filtering, in real time. The emergence of dynamically reconfigurable FPGAs made it possible to reduce the number of necessary resources to carry out an image-processing task (tasks chain). In this article, an image-processing application, image rotation, that exploits the FPGAs dynamic reconfiguration method is presented. This paper shows that the choice of an implementation, static or dynamic reconfiguration, depends on the nature of the application. A comparison is carried out between the dynamic and the static reconfiguration using two criteria: cost and perfo…

Computer scienceBlock diagramControl reconfigurationImage processingTask (computing)Computer engineeringSignal ProcessingComputer Vision and Pattern RecognitionElectrical and Electronic EngineeringField-programmable gate arrayDynamic methodReal-time operating systemImage restorationSimulationReal-Time Imaging
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CORENup: a combination of convolutional and recurrent deep neural networks for nucleosome positioning identification

2020

Abstract Background Nucleosomes wrap the DNA into the nucleus of the Eukaryote cell and regulate its transcription phase. Several studies indicate that nucleosomes are determined by the combined effects of several factors, including DNA sequence organization. Interestingly, the identification of nucleosomes on a genomic scale has been successfully performed by computational methods using DNA sequence as input data. Results In this work, we propose CORENup, a deep learning model for nucleosome identification. CORENup processes a DNA sequence as input using one-hot representation and combines in a parallel fashion a fully convolutional neural network and a recurrent layer. These two parallel …

Computer scienceCelllcsh:Computer applications to medicine. Medical informaticsBiochemistryConvolutional neural networkDNA sequencingchemistry.chemical_compoundStructural BiologyTranscription (biology)medicineHumansNucleosomeA-DNAEpigeneticsMolecular Biologylcsh:QH301-705.5Nucleosome classificationSettore ING-INF/05 - Sistemi Di Elaborazione Delle InformazioniSettore INF/01 - Informaticabiologybusiness.industryApplied MathematicsDeep learningResearchEpigeneticPattern recognitionGenomicsbiology.organism_classificationNucleosomesComputer Science ApplicationsRecurrent neural networkmedicine.anatomical_structurechemistrylcsh:Biology (General)Recurrent neural networkslcsh:R858-859.7Deep learning networksEukaryoteNeural Networks ComputerArtificial intelligenceDNA microarraybusinessDNABMC Bioinformatics
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PVAmpliconFinder: a workflow for the identification of human papillomaviruses from high-throughput amplicon sequencing

2019

Abstract Background The detection of known human papillomaviruses (PVs) from targeted wet-lab approaches has traditionally used PCR-based methods coupled with Sanger sequencing. With the introduction of next-generation sequencing (NGS), these approaches can be revisited to integrate the sequencing power of NGS. Although computational tools have been developed for metagenomic approaches to search for known or novel viruses in NGS data, no appropriate tool is available for the classification and identification of novel viral sequences from data produced by amplicon-based methods. Results We have developed PVAmpliconFinder, a data analysis workflow designed to rapidly identify and classify kno…

Computer scienceComputational biologylcsh:Computer applications to medicine. Medical informaticsBiochemistryWorkflowUser-Computer Interface03 medical and health sciencessymbols.namesakeStructural BiologyHumansVirus discoverylcsh:QH301-705.5PapillomaviridaeMolecular BiologyThroughput (business)PhylogenyAmplicon sequencing030304 developmental biologySanger sequencing0303 health sciencesBiological data030306 microbiologyMethodology ArticleApplied MathematicsHigh-Throughput Nucleotide SequencingPapillomavirusAmpliconComputer Science ApplicationsIdentification (information)Workflowlcsh:Biology (General)MetagenomicsDNA ViralAmplicon sequencingsymbolslcsh:R858-859.7Primer (molecular biology)DNA microarrayBMC Bioinformatics
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SoC-Based Implementation of the Backpropagation Algorithm for MLP

2008

The backpropagation algorithm used for the training of multilayer perceptrons (MLPs) has a high degree of parallelism and is therefore well-suited for hardware implementation on an ASIC or FPGA. However, most implementations are lacking in generality of application, either by limiting the range of trainable network topologies or by resorting to fixed-point arithmetic to increase processing speed. We propose a parallel backpropagation implementation on a multiprocessor system-on-chip (SoC) with a large number of independent floating-point processing units, controlled by software running on embedded processors in order to allow flexibility in the selection of the network topology to be traine…

Computer scienceDegree of parallelismOverhead (computing)MultiprocessingParallel computingFixed-point arithmeticPerceptronNetwork topologyField-programmable gate arrayBackpropagation2008 Eighth International Conference on Hybrid Intelligent Systems
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Selective Harmonic Elimination in a 5-Level Single Phase Converter with FPGA Based Controller

2018

Multilevel converters are becoming popular in high-power applications such as motor drives, renewable energy systems and distribution systems. Among all modulation techniques, selective harmonic elimination methods offer high quality voltage waveforms with operations at low switching frequency, hence, they are especially suitable for high-power applications. In this paper, a new analytical expression for the SHE problem formulated for a five-level converter is introduced, which is able to calculate the exact value of the switching angles. After a mathematical description of the proposed approach, this manuscript reports simulation and experimental results and analysis showing achievable res…

Computer scienceFive-level-inverter; analytical methods; selective harmonic elimination (SHE); real time implementationConvertersselective harmonic elimination (SHE)real time implementationHarmonic analysisanalytical methodsControl theoryModulationElectronic engineeringWaveformField-programmable gate arrayFive-level-inverterFrequency modulationVoltage2018 5th International Symposium on Environment-Friendly Energies and Applications (EFEA)
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Concurrent Molecular Dynamics Simulation of ST2 Water on a Transputer Array

1988

Abstract A concurrent implementation of a Molecular Dynamics program for ST2 water molecules is presented, which exploits the great potentialities of the Transputer arrays for statistical mechanical calculations. High load-balance efficiency is obtained using a new task decomposition algorithm which evenly distributes particles and interaction calculations among the processors. This approach can also help to solve efficiently the more general problem of task distribution in parallel computing of symmetric pairwise system properties.

Computer scienceGeneral Chemical EngineeringGeneral problemTransputerGeneral ChemistryParallel computingCondensed Matter PhysicsProcessor arrayMolecular dynamicsMIMDTask (computing)Modeling and SimulationDecomposition (computer science)General Materials SciencePairwise comparisonInformation SystemsMolecular Simulation
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Application based on dynamic reconfiguration of field-programmable gate arrays: JPEG 2000 arithmetic decoder

2005

This paper describes the implementation of a part of the JPEG 2000 algorithm (MQ decoder and arithmetic decoder) on a field-programmable gate array (FPGA) board by using dynamic reconfiguration. A comparison between static and dynamic reconfiguration is presented, and new analysis criteria (spatiotemporal efficiency, logic cost, and performance time) have been defined. The MQ decoder and arithmetic decoder are attractive for dynamic reconfiguration implementation in applications without parallel processing. This implementation is done on an architecture designed to study the dynamic reconfiguration of FPGAs: the ARDOISE architecture. The obtained implementation, based on four partial config…

Computer scienceGeneral EngineeringControl reconfigurationcomputer.file_formatAtomic and Molecular Physics and OpticsParallel processing (DSP implementation)Gate arrayJPEG 2000System on a chipHardware_ARITHMETICANDLOGICSTRUCTURESArithmeticField-programmable gate arraycomputerImage compressionOptical Engineering
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Burst analysis tool for developing neuronal networks exhibiting highly varying action potential dynamics

2012

In this paper we propose a firing statistics based neuronal network burst detection algorithm for neuronal networks exhibiting highly variable action potential dynamics. Electrical activity of neuronal networks is generally analyzed by the occurrences of spikes and bursts both in time and space. Commonly accepted analysis tools employ burst detection algorithms based on predefined criteria. However, maturing neuronal networks, such as those originating from human embryonic stem cells (hESC), exhibit highly variable network structure and time-varying dynamics. To explore the developing burst/spike activities of such networks, we propose a burst detection algorithm which utilizes the firing s…

Computer scienceNeuroscience (miscellaneous)Interval (mathematics)ta3112lcsh:RC321-57103 medical and health sciencesCellular and Molecular Neuroscience0302 clinical medicineMoving averageHistogramBiological neural networkMethods Articleburst analysislcsh:Neurosciences. Biological psychiatry. Neuropsychiatry030304 developmental biology0303 health sciencesspike trainsQuantitative Biology::Neurons and Cognitionmicroelectrode arrayMEAaction potential burstsdeveloping neuronal networksMultielectrode arrayhuman embryonic stem cellsPower (physics)nervous systemSkewnesshESCsSpike (software development)Biological systemNeuroscience030217 neurology & neurosurgeryNeuroscienceFrontiers in Computational Neuroscience
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FPGA/LST-SW Encryption Module Implementation for Satellite Remote Sensing Secure Systems

2020

The need for security of data transmitted from satellites to the ground has increased. Therefore, the need for secure onboard systems is in great demand, particularly in satellite remote sensing missions. This paper describes an approach for a secure Field Programmable Gate Arrays (FPGA) implementation of the Land Surface Temperature Split Window (LST-SW) algorithm, with objective to meat real-time requirements, area optimization and achieved higher Throughput goals to be sufficient for a secure remote sensing satellite applications and missions. The system is designed using VHDL (VHSIC Hardware Description Language) in a Highlevel design method. The experimental results demonstrate that th…

Computer scienceRemote sensing (archaeology)business.industrySatellite remote sensingVHDLClock ratebusinessEncryptionField-programmable gate arraycomputerThroughput (business)Computer hardwarecomputer.programming_language2020 Fourth International Conference On Intelligent Computing in Data Sciences (ICDS)
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Live demonstration: multiplexing AER asynchronous channels over LVDS Links with Flow-Control and Clock-Correction for Scalable Neuromorphic Systems

2017

Paper presented at the 2017 IEEE International Symposium on Circuits and Systems (ISCAS), held in Baltimore, MD, USA, on 28-31 May 2017.

Computer scienceSerial communicationGabor filters02 engineering and technologyMultiplexingMultiplexing0202 electrical engineering electronic engineering information engineeringComputerSystemsOrganization_SPECIAL-PURPOSEANDAPPLICATION-BASEDSYSTEMSField-programmable gate arrayComputer Science::Operating SystemsMassively parallelNeuromorphicsReal-time systemsSpiking neural networkQuantitative Biology::Neurons and CognitionArtificial neural networkbusiness.industry020208 electrical & electronic engineeringField programmable gate arraysNeuromorphic engineeringAsynchronous communicationEmbedded systemVoltage controlbusinessComputer hardwareNeural networksHardware_LOGICDESIGN
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