Search results for "Backplane"
showing 3 items of 3 documents
Pre-production validation of the ATLAS level-1 calorimeter trigger system
2006
The Level-1 Calorimeter Trigger is a major part of the first stage of event selection for the ATLAS experiment at the LHC. It is a digital, pipelined system with several stages of processing, largely based on FPGAs, which perform programmable algorithms in parallel with a fixed latency to process about 300 Gbyte/s of input data. The real-time output consists of counts of different types of trigger objects and energy sums. Prototypes of all module types have been undergoing intensive testing before final production during 2005. Verification of their correct operation has been performed stand-alone and in the ATLAS test-beam at CERN. Results from these investigations will be presented, along …
Synchronization of the distributed readout frontend electronics of the Baby MIND detector
2017
Baby MIND is a new downstream muon range detector for the WGASCI experiment. This article discusses the distributed readout system and its timing requirements. The paper presents the design of the synchronization subsystem and the results of its test.
Low energy routing platforms for optical interconnects using active plasmonics integrated with Silicon Photonics
2013
Power consumption and bandwidth of electronics appear as the main set of technology barriers in next-generation Data Center and High-Performance Computing (HPC) environments. The limited capacity and pitch lane of electrically wired interconnects require the development of new disruptive technologies to cope with the massive amount of data moving across all hierarchical communication levels, namely rack-to-rack, backplane, chip-to-chip and even on-chip interconnections. Plasmonics comes indeed as a disruptive technology that enables seamless interoperability between light beams and electronic control signals through the underlying metallic layer, providing thereby an inherent energy-efficie…