Search results for "Circuits"

showing 10 items of 358 documents

Optimal Delay-Power Tradeoff in Sparse Delay Tolerant Networks: a preliminary study

2006

In this paper we present a first attempt to study analytically the tradeoff between delivery delay and resource consumption for epidemic routing in Delay Tolerant Networks. We assume that the nodes cooperate in order to minimize a common cost equal to a weighted sum of the packet delivery delay and the total number of copies, which is strongly related to the power consumption. In this framework we determine the best policy each node should deploy in a very simple scenario where all the nodes have perfect knowledge of the system status. The result is used as an ideal reference to evaluate the performance of some heuristics proposed, investigating potential performance improvements and config…

Mathematical optimizationIdeal (set theory)business.industryComputer scienceNetwork packetNetwork delayNode (circuits)Elmore delayRouting (electronic design automation)businessHeuristicsComputer networkPower (physics)
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A new method for creating sparse design velocity fields

2006

We present a novel method for the computation of mesh node sensitivities with respect to the boundary node movement. The sensitivity field is sparse in a sense that movement of each boundary node affects only given amount of inner mesh nodes, which can result in considerable savings in the storage space. The method needs minimal control from the user, and it does not place any restrictions (such as block structure) on the mesh. Use of the method is demonstrated with a shape optimization problem using CAD-free parametrization. A solution to the classical die-swell free boundary problem by coupling the boundary node locations with the state variables is also presented. In that case, sparsity …

Mathematical optimizationMechanical EngineeringComputationComputational MechanicsGeneral Physics and AstronomyBoundary (topology)ResidualComputer Science Applicationssymbols.namesakeMechanics of MaterialsMesh generationJacobian matrix and determinantsymbolsFree boundary problemNode (circuits)Sensitivity (control systems)AlgorithmMathematicsComputer Methods in Applied Mechanics and Engineering
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Design of a Permanent Magnet Synchronous Generator using Interactive Multiobjective Optimization

2017

We consider an analytical model of a permanent magnet synchronous generator and formulate a mixed-integer constrained multiobjective optimization problem with six objective functions. We demonstrate the usefulness of solving such a problem by applying an interactive multiobjective optimization method called NIMBUS. In the NIMBUS method, a decision is iteratively involved in the optimization process and directs the solution process in order to find her/his most preferred Pareto optimal solution for the problem. We also employ a commonly used noninteractive evolutionary multiobjective optimization method NSGA-II to generate a set of solutions that approximates the Pareto set and demonstrate t…

Mathematical optimizationPareto optimizationstator windings synchronous generatorsComputer science02 engineering and technologyPermanent magnet synchronous generatorpermanent magnet machines01 natural sciencesMulti-objective optimizationSet (abstract data type)optimointi0103 physical sciences0202 electrical engineering electronic engineering information engineeringElectrical and Electronic Engineeringmagnetic circuitsta113010302 applied physicsta213pareto-tehokkuus020208 electrical & electronic engineeringDesign toolsPareto principleProcess (computing)Control engineeringstator windingsControl and Systems Engineeringsynchronous generatorsdesign toolspermanent magnet (PM) machinesgenerators
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A heuristic for fast convergence in interference-free channel assignment using D1EC coloring

2010

This work proposes an efficient method for solving the Distance-1 Edge Coloring problem (D1EC) for the assignment of orthogonal channels in wireless networks with changing topology. The coloring algorithm is performed by means of the simulated annealing method, a generalization of Monte Carlo methods for solving combinatorial problems. We show that the simulated annealing-based coloring converges fast to a suboptimal coloring scheme. Furthermore, a stateful implementation of the D1EC scheme is proposed, in which network coloring is executed upon topology changes. The stateful D1EC is also based on simulated annealing and reduces the algorithm’s convergence time by one order of magnitude in …

Mathematical optimizationSettore ING-INF/03 - TelecomunicazioniComputer scienceHeuristic (computer science)Wireless networkTopology (electrical circuits)[INFO.INFO-MO]Computer Science [cs]/Modeling and SimulationGreedy coloringEdge coloringStateful firewallSimulated annealingConvergence (routing)Channel assignment Edge coloring Simulated annealing.Algorithm
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OLS Identification of network topologies

2011

Abstract In many applications, it is important to derive information about the topology and the internal connections of more dynamical systems interacting together. Examples can be found in fields as diverse as Economics, Neuroscience and Biochemistry. The paper deals with the problem of deriving a descriptive model of a network, collecting the node outputs as time series with no use of a priori insight on the topology. We cast the problem as the optimization of a cost function where a set of parameters are used to operate a trade-off between accuracy and complexity in the final model. The problem of reducing the complexity is addressed by fixing a certain degree of sparsity and finding the…

Mathematical optimizationtopologyDynamical systems theoryNode (networking)Topology (electrical circuits)topology networks identificationFunction (mathematics)Network topologySet (abstract data type)Identification (information)Settore ING-INF/04 - Automaticatopology; networks; identificationnetworksidentificationA priori and a posterioriMathematicsIFAC Proceedings Volumes
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Voltage Source Multilevel Inverters With Reduced Device Count: Topological Review and Novel Comparative Factors

2021

Multilevel inverters (MLIs) have gained increasing interest for advanced energy-conversion systems due to their features of high-quality produced waveforms, modularity, transformerless operation, voltage, and current scalability, and fault-tolerant operation. However, these merits usually come with the cost of a high number of components. Over the past few years, proposing new MLIs with a lower component count has been one of the most active topics in power electronics. The first aim of this article is to update and summarize the recently developed multilevel topologies with a reduced component count, based on their advantages, disadvantages, construction, and specific applications. Within …

Modularity (networks)Computer science020208 electrical & electronic engineeringTopology (electrical circuits)02 engineering and technologyInductorNetwork topologylaw.inventionCapacitorlawPower electronicsComponent (UML)0202 electrical engineering electronic engineering information engineeringElectronic engineeringVoltage sourceElectrical and Electronic EngineeringVoltageIEEE Transactions on Power Electronics
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New Multilevel Inverter Topology with Reduced Component Count

2019

This paper introduces a new topology of modular multilevel inverters, being suitable in medium and high voltage applications. As compared to the existing circuits, the proposed topology has advantages of high ‘levels/components’ ratio, increasing the output voltage levels without increasing the voltage stress across the used switches, structure simplicity, isolation features, and modularity. These merits allow it to fit well in high-reliability medium-power applications, which require fast troubleshooting and maintenance flexibility. Operating principles of the proposed scheme are detailed in low frequency and pulse width modulation. Simulation and experimental results validate the effectiv…

Modularity (networks)business.industryComputer science020209 energy020208 electrical & electronic engineeringTopology (electrical circuits)High voltage02 engineering and technologyModular designNetwork topologyTopology0202 electrical engineering electronic engineering information engineeringbusinessPulse-width modulationElectronic circuitVoltage2019 21st European Conference on Power Electronics and Applications (EPE '19 ECCE Europe)
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Quasi‐digital front‐ends for current measurement in integrated circuits with giant magnetoresistance technology

2014

In this study, the authors report on two different electronic interfaces for low-power integrated circuits electric current monitoring through current-to-frequency (I-f) conversion schemes. This proposal displays the intrinsic advantages of the quasi-digital systems regarding direct interfacing and self-calibrating capabilities. In addition, as current-sensing devices, they have made use of the giant magnetoresistance (GMR) technology because of its high sensitivity and compatibility with standard complementary metal oxide semiconductor processes. Single elements and Wheatstone bridges based on spin-valves and magnetic tunnel junctions have been considered. In this sense, schematic-level si…

ModulationResistive sensorsEngineeringWheatstone bridgebusiness.industryElectrical engineeringControl and Systems Engineering; Electrical and Electronic EngineeringIntegrated circuitsGiant magnetoresistance:Enginyeria electrònica::Microelectrònica::Circuits integrats [Àrees temàtiques de la UPC]Integrated circuitInterfacelaw.inventionPrinted circuit boardCMOSControl and Systems EngineeringlawInterfacingLow-power electronicsLow-powerCircuits integratsElectrical and Electronic EngineeringElectric currentbusinessIET Circuits, Devices & Systems
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Enhancing the Sniper Simulator with Thermal Measurement

2014

This paper presents the enhancement of the Sniper multicore / manycore simulator with thermal measurement possibilities using the HotSpot simulator. We present a plugin that interacts with Sniper to retrieve simulation data (integration areas and power consumptions) and calls HotSpot to compute the corresponding thermal results. The plugin also builds a two dimensional floorplan for the simulated microarchitecture. Furthermore we plan to integrate the simulation methodology presented here into an automatic design space exploration process using the multi-objective optimization tool called FADSE. Keywords—multicore; simulator; power consumption; thermal; HotSpot; Sniper

Multi-core processorEngineeringComputer architecture simulatorbusiness.industryDesign space explorationReal-time computingHardware_PERFORMANCEANDRELIABILITYcomputer.software_genreFloorplanMicroarchitecturePower consumptionThermalHardware_INTEGRATEDCIRCUITSPlug-inbusinesscomputerSimulation
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Nonlinear analysis of classical phase-locked loops in signal's phase space

2014

Abstract Discovery of undesirable hidden oscillations, which cannot be found by the standard simulation, in phase-locked loop (PLL) showed the importance of consideration of nonlinear models and development of rigorous analytical methods for their analysis. In this paper for various signal waveforms, analytical computation of multiplier/mixer phase-detector characteristics is demonstrated, and nonlinear dynamical model of classical analog PLL is derived. Approaches to the rigorous nonlinear analysis of classical analog PLL are discussed.

Multiplier (Fourier analysis)Phase-locked loopNonlinear systemControl theoryPhase spaceComputationHardware_INTEGRATEDCIRCUITSWaveformPhase detector characteristicHardware_PERFORMANCEANDRELIABILITYMultistabilityMathematicsIFAC Proceedings Volumes
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