Search results for "Computer Hardware"
showing 10 items of 378 documents
Electrochemical Processes and Apparatuses for the Abatement of Acid Orange 7 in Water
2014
We have studied the electrochemical treatment of aqu eous solutions contaminated by Acid Orange 7 (AO7) by electro-Fenton process (EF). The main object ive was to evaluate how the electrochemical route affects the performances of the d egradation process. EF process was carried out in a number of very different reactors: conventional bench scale electrochem ical cell, microfluidic electrochemical reactor, microbial fuel cell and stack for reverse electrodialysis processes. The utilisation of micro devices allowed to work without the addition of a supporting elec trolyte and improved the performances of EF. Microbial fuel cell did not need the supply of electric energy bu t our device requir…
An Embedded Module for Iris Micro-Characteristics Extraction
2009
In this paper a new approach, based on iris micro-characteristics, has been used to make possible an embedded biometric extractor. This recognition approach is based on ophthalmologic studies that have proven the existence of different micro-characteristics as well as fingerprint minutiae. These micro-characteristics are permanent and immutable and they can be used to create strong and robust identification systems.Biometric recognition systems are critical components of our everyday lives. Since such electronic products evolve to software intensive systems, where software, becoming larger, more complex and prevalent, introduces many problems in the development phases. The development of em…
GAPPCO: An Easy to Configure Geometric Algebra Coprocessor Based on GAPP Programs
2017
Because of the high numeric complexity of Geometric Algebra, its use in engineering applications relies heavily on tools and devices for efficient implementations. In this article, we present a novel hardware design for a Geometric Algebra coprocessor, called GAPPCO, which is based on Geometric Algebra Parallelism Programs (GAPP). GAPPCO is a design for a coprocessor combining the advantages of optimizing software with a configurable hardware able to implement arbitrary Geometric Algebra algorithms. The idea is to have a fixed hardware easily and fast to be configured for different algorithms. We describe the new hardware design together with the complete tool chain for its configuration.
Hardware and Software Platforms for Distributed Computing on Resource Constrained Devices
2014
The basic idea of distributed computing is that it is possible to solve a large problem by using the resources of various computing devices connected in a network. Each device interacts with each other in order to process a part of a problem, contributing to the achievement of a global solution. Wireless sensor networks (WSNs) are an example of distributed computing on low resources devices. WSNs encountered a considerable success in many application areas. Due to the constraints related to the small sensor nodes capabilities, distributed computing in WSNs allows to perform complex tasks in a collaborative way, reducing power consumption and increasing battery life. Many hardware platforms …
Fixed-size Quadruples for a New, Hardware-Oriented Representation of the 4D Clifford Algebra
2010
Clifford algebra (geometric algebra) offers a natural and intuitive way to model geometry in fields as robotics, machine vision and computer graphics. This paper proposes a new representation based on fixed-size elements (quadruples) of 4D Clifford algebra and demonstrates that this choice leads to an algorithmic simplification which in turn leads to a simpler and more compact hardware implementation of the algebraic operations. In order to prove the advantages of the new, quadruple-based representation over the classical representation based on homogeneous elements, a coprocessing core supporting the new fixed-size Clifford operands, namely Quad-CliffoSor (Quadruple-based Clifford coproces…
Embedded Coprocessors for Native Execution of Geometric Algebra Operations
2016
Clifford algebra or geometric algebra (GA) is a simple and intuitive way to model geometric objects and their transformations. Operating in high-dimensional vector spaces with significant computational costs, the practical use of GA requires dedicated software and/or hardware architectures to directly support Clifford data types and operators. In this paper, a family of embedded coprocessors for the native execution of GA operations is presented. The paper shows the evolution of the coprocessor family focusing on the latest two architectures that offer direct hardware support to up to five-dimensional Clifford operations. The proposed coprocessors exploit hardware-oriented representations o…
A Programmable Networked Processing Node for 3D Brain Vessels Reconstruction
2011
Real-time 3D imaging represents a developing trend in medical imaging. However, most of the 3D medical imaging algorithms are computationally intensive. In this paper, a programmable networked node for 3D brain vessels reconstruction is proposed. Starting from 2D PC-MRA (Phase-Contrast Magnetic Resonance Angiography) sequences, the node is able to generate the 3D brain vasculature using the MIP (Maximum Intensity Projection) algorithm. The node has been prototyped on the Celoxica RC203E board, equipped with a Virtex II FPGA, to get the advantages of an hardware implementation, reaching a better throughput with respect to analogous software implementations. Its generality and programmable ca…
Signal integrity studies at optical multiplexer board for TileCal system
2007
6 pages.-- ISI Article Identifier: 000253651800006
Installation and commissioning of the TileCal Read-Out Drivers
2007
TileCal is the hadronic tile calorimeter of the ATLAS experiment at LHC/CERN. The main component of the TileCal back-end electronics is the Read-Out Driver (ROD). The ROD system is placed between the first and the second level trigger and it is the responsible for processing the data gathered by the detector. The principal devices of the RODs are the Digital Signal Processors (DSPs) mounted in the Processing Units (PUs) daughterboards. The architecture and functionality of the RODs are briefly explained. Then, it is presented the ROD system installation in the ATLAS electronics cavern. Currently, the RODs are being used for the detector commissioning. It is detailed the Detector and Verific…
An Effective Satellite Remote Sensing Tool Combining Hardware and Software Solutions
2019
In this paper we propose a new effective remote sensing tool combining hardware and software solutions as an extension of our previous work. In greater detail the tool consists of a low cost receiver subsystem for public weather satellites and a signal and image processing module for several tasks such as signal and image enhancement, image reconstruction and cloud detection. Our solution allows to manage data from satellites effectively with low cost components and portable software solutions. We aim at sampling and processing of the modulated signal entirely in software enabled by Software Defined Radios (SDR) and CPU computational speed overcoming hardware limitation such as high receive…