Search results for "Computer architecture"

showing 10 items of 191 documents

Generation of Hardware/Software systems based on CAL dataflow description

2011

International audience; This paper presents a new development of rapid prototyping tools for system design based on data-flow specifications. In this context, the efficiency of tools for the automatic translation from the data-flow programs to C and/or HDL are assessed by means of two design cases. The paper also introduces the new concept of the automatic synthesis of interfaces. Such generic interfaces are implemented by using an embedded microprocessor, which can support a large variety of interfaces already available as native IP libraries in the case of FPGA. The two design cases described here have been developed, tested and validated on different implementation platforms. The results…

Rapid prototypingComputer scienceDataflowImage ProcessingInterface (computing)Context (language use)02 engineering and technologyHardware/Software Co-Design01 natural scienceslaw.inventionDesign MethodologieslawArchitecture0103 physical sciences0202 electrical engineering electronic engineering information engineeringMatching[ INFO.INFO-ES ] Computer Science [cs]/Embedded SystemsField-programmable gate array010302 applied physicsFlexibility (engineering)CALACMHardware/Software020202 computer hardware & architectureAlgorithmMicroprocessorComputer architectureSignal ProcessingHW/SWSystems designinterface[INFO.INFO-ES]Computer Science [cs]/Embedded Systems
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Rapid prototyping platform for stream-oriented reconfigurable computing applications

2010

In this paper we present a methodology and tool for rapid prototyping of real time image processing applications. We describe our design flow of multiprocessor system on chip (MPSoC) architectures based on hardware/software components. This methodology provides automated methods to specify, generate the hardware, software, and the architectural interfaces between them. Our methodology starts from system level specification of the application with parallel processes described in C-code. The processes communicate through an abstract channel called streams. We describe also the solution that we proposed to synthesize a custom bus architecture for the reconfigurable computing applications, whic…

Rapid prototypingHardware architectureSoftwareComputer architecturebusiness.industryComputer scienceEmbedded systemComponent-based software engineeringSystem on a chipMPSoCField-programmable gate arraybusinessReconfigurable computingInternational Conference on Computer and Communication Engineering (ICCCE'10)
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Missing Curious Fraction Problems

2018

In this paper we present a study of one of the best-known types of descriptive word fraction problems. These problems have disappeared from today’s textbooks but are hugely important for developing arithmetic thinking. The aim of this paper is to examine the historical solution methods for these problems and discuss the analytical readings suggested by the authors. On the basis of this analysis we have conducted a preliminary study of the performance of 35 Spanish students who are highly trained in mathematics. Our results show that these students have a preference for algebraic reasoning, are reluctant to use arithmetic methods, and have reading comprehension difficulties that are reflecte…

Reading comprehensionBasis (linear algebra)Problem statementFraction (mathematics)Literal and figurative languageLinguisticsPreferenceWord (computer architecture)Algebraic reasoning
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The effectiveness of multimedia programmes in children's vocabulary learning

2009

The present experiment investigated the effect of three different presentation modes in children's vocabulary learning with a self-guided multimedia programmes. Participants were 135 third and fourth grade children who read a short English language story presented by a computer programme. For 12 key (previously unknown) words in the story, children received verbal annotations (written translation), visual annotations (picture representing the word), or both. Recall of word translations was better for children who only received verbal annotations than for children who received simultaneously visual and verbal annotations or visual annotations only. Results support previous research about cog…

RecallMultimediaComputer scienceWorking memorymedia_common.quotation_subjectEducational technologyShort-term memorycomputer.software_genreVocabulary developmentEducationPresentationcomputerWord (computer architecture)Cognitive loadmedia_commonBritish Journal of Educational Technology
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Design and Implementation of ForCES Protocol

2017

This paper proposes the design and implementation of the ForCES protocol, specifically FP logical point of the ForCES architecture, which is strictly the communication between the CE (Control Element) and the FE (Forwarding Element). It is a flexible and reprogrammable architecture that is established within the specifications issued and defined by the ForCES working group, and consists of elaboration of a protocol that carries information between both elements. In order to comprobate the correct functioning of the implemented the ForCES protocol, is we provide a network testbed scenario, which consist an application client-server. Each device has equipped with the application which based o…

RouterJavaProgrammable networks and systemsFlexible architecturesComputer scienceApplication serverStructs LFBsControl (management)Server applicationINGENIERIA TELEMATICAcomputer.software_genreForCES ProtocolComputer architectureTestbed ForCESOpen architectureClients applicationOpen architectureArchitectureElement (category theory)computerProtocol (object-oriented programming)computer.programming_language
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Self-configuring multipath intra-mesh infrastructure QoS based routing

2016

International audience; Multi-path routing concept was largely exploited in wireless networks to provide benefits such as fault tolerance, load balancing, performance improvement in terms of latency, etc. In this paper, we propose a multi-path routing based protocol named MP-IMRR (Multi-path Intra-Mesh infrastructure Routing protocol) to improve our previously defined QoS based routing protocol for wireless mesh networks (i.e. IMRR). MP-IMRR is defined in order to achieve better reactivity and faster recovery from eventual route failures than the IMRR protocol by adopting the backup routes concept. Besides, given the complexity increase while considering network management systems, we adopt…

Routing protocolDynamic Source RoutingPerformance Evaluation[ INFO ] Computer Science [cs]Computer scienceDistributed computingQoS routingEnhanced Interior Gateway Routing ProtocolWireless communicationnetwork simulator ns-3Wireless Routing Protocol02 engineering and technologyRouting protocolsBandwidth0202 electrical engineering electronic engineering information engineeringMP-IMRRmultipath routing based protocolWireless Mesh Network[INFO]Computer Science [cs][ SDV.IB ] Life Sciences [q-bio]/BioengineeringComputer architectureMP-IMRR protocolRoutingStatic routingZone Routing Protocolautonomic computing paradigmQoS based routing protocolbusiness.industrymultipath intramesh infrastructure routing protocolComputerSystemsOrganization_COMPUTER-COMMUNICATIONNETWORKSmultipath channels020206 networking & telecommunicationsMulti-path routingwireless mesh networksbackup routes conceptLink-state routing protocolself-configuring infrastructurequality of service020201 artificial intelligence & image processingHazy Sighted Link State Routing ProtocolSelf-configuring[SDV.IB]Life Sciences [q-bio]/Bioengineeringbusinessnetwork management systemsComputer network
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A new heterogeneous and reconfigurable architecture for image analysis

1993

In the paper a new architecture for image analysis: HERMIA (Heterogeneous and Reconfigurable Machine for Image Analysis) is presented. It has bt:en developed at the University of Palermo, inside the Progetto Finalizzato of the ltalian Council of Researches (CNR): Sistemi informatici e Calcolo Parallelo. The architecture of the HERMIA-machine is reconfigurable, moreover the integration of heterogeneous module, oriented to the solution of specific problems, allows to salve complex problems by search of optimal strategies. Signa! processing units allows the user to handle and integrate multi-sensors signals (from video, scanner, music recorder). Here the generai architecture, the hardware impl…

ScannerDigital signal processorSignal processingHPC Signal Processing Image Analysis reconfigurable architecture.Settore INF/01 - InformaticaComputer architectureComputer scienceApplications architectureSystem evaluationArchitectureComplex problemsImage (mathematics)
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Self-Organizing Architectures for Digital Signal Processing

2013

Self-organizationSettore ING-INF/05 - Sistemi Di Elaborazione Delle InformazioniComputer sciencebusiness.industrycomputer.software_genreSignalDigital image processingDigital Signal ProcessingDigital signalbusinessAudio signal processingcomputerDigital signal processingComputer hardwareComputer Architectures
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Self-organizing maps: A new digital architecture

1991

An original hardware architecture implementing the self-organizing feature maps, which is one of the most powerful and efficent neural network algorithm, is presented. The architecture, contrary to the most investigated hardware implementations of neural networks, is a full digital one and it may be easily built by using the standard VLSI techniques.

Self-organizing mapHardware architectureVery-large-scale integrationArtificial neural networkComputer architectureFeature (computer vision)Computer scienceApplications architectureArchitectureDigital architecture
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Automatically Modeling Linguistic Categories in Spanish

2010

This paper presents an approach to process Spanish linguistic categories automatically. The approach is based in a module of a prototype named WIH (Word Intelligent Handler), which is a project to develop a conversational bot. It basically learns category usage sequence in a sentence. It extracts a weighting metric to discriminate most common structures in real dialogs. Such a metric is important to define the preferred organization to be used by the robot to build an answer.

SequenceComputer scienceProcess (engineering)Metric (mathematics)RobotA-weightingSentenceLinguisticsWord (computer architecture)
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