Search results for "Computer network"
showing 10 items of 1634 documents
Pulsed Electro-Acoustic Method for specimens and cables employed in HVDC systems: Some feasibility considerations
2018
Recent experiments on the use of the PEA method for testing dielectric materials in specimens and comparison with a detailed model provide an insight of the phenomenon and suggest the need of adopting similar models also for cables. What is said is even more important considering the possible future adoption of the PEA methodology to test DC cables for Pre-Qualification and Type Tests. The use of an accurate model of the PEA cell used for testing specimens and related experiments prove that the thickness of the different parts composing the PEA setup is a basic element for providing accurate charge reading and interpretation of the phenomenon. Both simulation and experimental results, carri…
C-switches: Increasing switch radix with current integration scale
2011
In large switch-based interconnection networks, increasing the switch radix results in a decrease in the total number of network components, and consequently the overall cost of the network can be significantly reduced. Moreover, high-radix switches are an attractive option to improve the network performance in terms of latency, since hop count is also reduced. However, there are some problems related to the integration scale to design such single-chip switches. In this paper we discuss key issues and evaluate an interesting alternative for building high-radix switches going beyond the integration scale bounds. The idea basically consists in combining several current smaller single-chip swi…
On asymmetric periodic solutions in relay feedback systems
2021
Abstract Asymmetric self-excited periodic motions or periodic solutions which are produced by relay feedback systems that have symmetric characteristics are studied in the paper. Two different mechanisms of producing an asymmetric oscillation by a system with symmetric properties are noted and analyzed by the locus of a perturbed relay system (LPRS) method. Bifurcation between the ability to excite symmetric and asymmetric oscillation with variation of system parameters is analyzed. An algorithm of finding asymmetric solutions is proposed.
An Energy Saving Mechanism Based on Vacation Queuing Theory in Data Center Networks
2018
To satisfy the growing need for computing resources, data centers consume a huge amount of power which raises serious concerns regarding the scale of the energy consumption and wastage. One of the important reasons for such energy wastage relates to the redundancies. Redundancies are defined as the backup routing paths and unneeded active ports implemented for the sake of load balancing and fault tolerance. The energy loss may also be caused by the random nature of incoming packets forcing nodes to stay powered on all the times to await for incoming tasks. This paper proposes a re-architecturing of network devices to address energy wastage issue by consolidating the traffic arriving from di…
A Novel Fault-Tolerant Routing Algorithm for Mesh-of-Tree Based Network-on-Chips
2019
Use of bus architecture based communication with increasing processing elements in System-on-Chip (SoC) leads to severe degradation of performance and speed of the system. This bottleneck is overcome with the introduction of Network-on-Chips (NoCs). NoCs assist in communication between cores on a single chip using router based packet switching technique. Due to miniaturization, NoCs like every Integrated circuit is prone to different kinds of faults which can be transient, intermittent or permanent. A fault in any one component of such a crucial network can degrade performance leaving other components non-usable. This paper presents a novel Fault-Tolerant routing Algorithm for Mesh-of-Tree …
Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing
2010
The high-performance computing domain is enriching with the inclusion of Networks-on-chip (NoCs) as a key component of many-core (CMPs or MPSoCs) architectures. NoCs face the communication scalability challenge while meeting tight power, area and latency constraints. Designers must address new challenges that were not present before. Defective components, the enhancement of application-level parallelism or power-aware techniques may break topology regularity, thus, efficient routing becomes a challenge.In this paper, uLBDR (Universal Logic-Based Distributed Routing) is proposed as an efficient logic-based mechanism that adapts to any irregular topology derived from 2D meshes, being an alter…
Contrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology
2010
Nowadays, system designers have adopted Networks-on-Chip as communication infrastructure of general-purpose tile-based Multi-Processor System-on-Chip (MPSoC). Such decision implies that a certain topology has to be selected to efficiently interconnect many cores on the chip. To ease such a choice, the networking literature offers a plethora of works about topology analysis and characterization for the off-chip domain. However, theoretical parameters and many intuitive assumptions of such off-chip networks do not necessarily hold when a topology is laid out on a 2D silicon surface. This is due to the distinctive features of silicon technology design pitfalls. This work is a first milestone t…
Estimating Missing Information by Cluster Analysis and Normalized Convolution
2018
International audience; Smart city deals with the improvement of their citizens' quality of life. Numerous ad-hoc sensors need to be deployed to know humans' activities as well as the conditions in which these actions take place. Even if these sensors are cheaper and cheaper, their installation and maintenance cost increases rapidly with their number. We propose a methodology to limit the number of sensors to deploy by using a standard clustering technique and the normalized convolution to estimate environmental information whereas sensors are actually missing. In spite of its simplicity, our methodology lets us provide accurate assesses.
A Nonisovelocity Geometry-Based Underwater Acoustic Channel Model
2018
This paper proposes a new geometry-based shallow underwater acoustic (UWA) channel model allowing for nonisovelocity ocean conditions. The fact that the isovelocity assumption does not hold in many real-world scenarios motivates the need for developing channel models for nonisovelocity UWA propagation environments. Starting from a geometrical model, we develop a stochastic channel model for a single-input single-output (SISO) vehicle-to-vehicle UWA channel assuming that the ocean surface and bottom are rough and that the speed of sound varies with depth. The effect of the nonisovelocity condition has been assessed regarding its influence on the temporal autocorrelation function, the frequen…
Surgical implantation of electronic tags does not induce medium-term effect: insights from growth and stress physiological profile in two marine fish…
2020
Abstract Background Telemetry applied to aquatic organisms has recently developed greatly. Physiological sensors have been increasingly used as tools for fish welfare monitoring. However, for the technology to be used as a reliable welfare indicator, it is important that the tagging procedure does not disrupt fish physiology, behaviour and performance. In this communication, we share our medium-term data on stress physiological profile and growth performance after surgical tag implantation in two important marine fish species for European aquaculture, the sea bream (Sparus aurata) and the European sea bass (Dicentrarchus labrax). Results Blood samples after surgical tag implantation (46 day…