Search results for "Dataflow"

showing 10 items of 12 documents

Acceleration of image filtering algorithms for 3D visualization of murine lungs using dataflow engines

2015

Image filtering is one of the most common and important tasks in image processing applications. In this paper, image processing using a mean filtering algorithm combined with thresholding and binarization algorithms for the 3D visualization and analysis of murine lungs is explained. These algorithms are then mapped on the Maxler's MAX2336B Dataflow Engine (DFE) to significantly increase calculation speed. Several different DFE configurations were tested and each yielded different performance characteristics. Optimal algorithm calculation speed was up to 30 fold baseline calculation speed.

Adaptive filterAccelerationComputer scienceDataflowDigital image processingImage processingAlgorithmThresholdingVisualizationImage (mathematics)2015 IEEE 15th International Conference on Bioinformatics and Bioengineering (BIBE)
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An Analysis of the Influence of Noneffective Instructions in Linear Genetic Programming

2020

Abstract Linear Genetic Programming (LGP) represents programs as sequences of instructions and has a Directed Acyclic Graph (DAG) dataflow. The results of instructions are stored in registers that can be used as arguments by other instructions. Instructions that are disconnected from the main part of the program are called noneffective instructions, or structural introns. They also appear in other DAG-based GP approaches like Cartesian Genetic Programming (CGP). This article studies four hypotheses on the role of structural introns: noneffective instructions (1) serve as evolutionary memory, where evolved information is stored and later used in search, (2) preserve population diversity, (3)…

Computational MathematicsTheoretical computer scienceDataflowComputer scienceLinear genetic programmingPopulation diversitySymbolic regressionCartesian genetic programmingDirected acyclic graphBiological EvolutionAlgorithmsNeutral mutationEvolutionary Computation
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«Motion Estimation Accelerator with User Search Strategy in an RVC Context»

2009

Motion estimation represents a key module in video compression. The RVC context requires proposing a flexible solution for motion estimation. According to the nature of the application, a full search is sometimes not suitable, hence, alternative fast/reduced solutions should be considered. This paper proposes a model and implementation of a flexible motion estimation engine, which can be configured to support any user-defined search strategy. Typically, the computational requirements of the search strategy can be traded with the RD-performance of the obtained video encoder. A CAL dataflow description of the accelerator is proposed so that it can be easily handled in the RVC context. An auto…

Computer scienceDataflowMotion estimationReal-time computingCode (cryptography)Context (language use)EncoderData compression2009 16th IEEE International Conference on Image Processing (ICIP)
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A Selective Change Driven System for High-Speed Motion Analysis.

2016

Vision-based sensing algorithms are computationally-demanding tasks due to the large amount of data acquired and processed. Visual sensors deliver much information, even if data are redundant, and do not give any additional information. A Selective Change Driven (SCD) sensing system is based on a sensor that delivers, ordered by the magnitude of its change, only those pixels that have changed most since the last read-out. This allows the information stream to be adjusted to the computation capabilities. Following this strategy, a new SCD processing architecture for high-speed motion analysis, based on processing pixels instead of full frames, has been developed and implemented into a Field …

Data streamMotion analysisLaser scanningComputer scienceReal-time computing02 engineering and technologylcsh:Chemical technology01 natural sciencesBiochemistryArticleAnalytical ChemistryInformàtica0202 electrical engineering electronic engineering information engineeringlcsh:TP1-1185data-flow architectureElectrical and Electronic EngineeringImage sensorhigh-speed visual acquisitionField-programmable gate arrayInstrumentationDataflow architecturePixellaser scanning020208 electrical & electronic engineering010401 analytical chemistryFrame (networking)Arquitectura d'ordinadorsAtomic and Molecular Physics and Optics0104 chemical sciencesCMOS image sensor; event-based vision; high-speed visual acquisition; data-flow architecture; FPGA system; laser scanningCMOS image sensorevent-based visionFPGA systemSensors (Basel, Switzerland)
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Deployment of the ATLAS high level trigger

2005

The ATLAS combined test beam in the second half of 2004 saw the first deployment of the ATLAS high-level triggers (HLT). The next steps are deployment on the pre-series farms in the experimental area during 2005, commissioning and cosmics tests in 2006 and collisions in 2007. This paper reviews the experience gained in the test beam, describes the current status and discusses the further enhancements to be made. We address issues related to the dataflow, selection algorithms, testing, software distribution, installation and improvements

DataflowComputer sciencebusiness.industrySoftware distributionCluster (spacecraft)medicine.anatomical_structureInformation engineeringComputer engineeringSoftware deploymentAtlas (anatomy)Systems engineeringmedicineSystem integrationbusinessSelection algorithm14th IEEE-NPSS Real Time Conference, 2005.
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Deployment of the ATLAS High-Level Trigger

2006

The ATLAS combined test beam in the second half of 2004 saw the first deployment of the ATLAS High-Level Trigger (HLT). The next steps are deployment on the pre-series farms in the experimental area during 2005, commissioning and cosmics tests with the full detector in 2006 and collisions in 2007. This paper reviews the experience gained in the test beam, describes the current status and discusses the further enhancements to be made. We address issues related to the dataflow, integration of selection algorithms, testing, software distribution, installation and improvements.

Nuclear and High Energy PhysicsDataflowCluster (spacecraft)01 natural sciencesAtlas (anatomy)testbeam0103 physical sciences[PHYS.HEXP]Physics [physics]/High Energy Physics - Experiment [hep-ex]medicineElectrical and Electronic EngineeringSelection algorithmSimulationhigh-level triggersPhysicshigh-energy physics010308 nuclear & particles physicsbusiness.industryDetectorATLASSoftware distributionTriggertriggeringmedicine.anatomical_structureNuclear Energy and EngineeringClustersoftware integrationSoftware deploymentSystems engineeringSystem integrationLHCbusinessIEEE Transactions on Nuclear Science
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Common fixed points of mappings satisfying implicit relations in partial metric spaces

2013

Matthews, [S. G. Matthews, Partial metric topology, in: Proc. 8th Summer Conference on General Topology and Applications, in: Ann. New York Acad. Sci., vol. 728, 1994, pp. 183-197], introduced and studied the concept of partial metric space, as a part of the study of denotational semantics of dataflow networks. He also obtained a Banach type fixed point theorem on complete partial metric spaces. Very recently Berinde and Vetro, [V. Berinde, F. Vetro, Common fixed points of mappings satisfying implicit contractive conditions, Fixed Point Theory and Applications 2012, 2012:105], discussed, in the setting of metric and ordered metric spaces, coincidence point and common fixed point theorems fo…

Pure mathematicsAlgebra and Number TheoryDataflowCoincidence point common fixed point contraction implicit relation partial metric space.Fixed-point theoremFixed pointMetric spaceDenotational semanticsSettore MAT/05 - Analisi MatematicaCommon fixed pointGeneral topologyCoincidence pointAnalysisMathematicsJournal of Nonlinear Sciences and Applications
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Generation of Hardware/Software systems based on CAL dataflow description

2011

International audience; This paper presents a new development of rapid prototyping tools for system design based on data-flow specifications. In this context, the efficiency of tools for the automatic translation from the data-flow programs to C and/or HDL are assessed by means of two design cases. The paper also introduces the new concept of the automatic synthesis of interfaces. Such generic interfaces are implemented by using an embedded microprocessor, which can support a large variety of interfaces already available as native IP libraries in the case of FPGA. The two design cases described here have been developed, tested and validated on different implementation platforms. The results…

Rapid prototypingComputer scienceDataflowImage ProcessingInterface (computing)Context (language use)02 engineering and technologyHardware/Software Co-Design01 natural scienceslaw.inventionDesign MethodologieslawArchitecture0103 physical sciences0202 electrical engineering electronic engineering information engineeringMatching[ INFO.INFO-ES ] Computer Science [cs]/Embedded SystemsField-programmable gate array010302 applied physicsFlexibility (engineering)CALACMHardware/Software020202 computer hardware & architectureAlgorithmMicroprocessorComputer architectureSignal ProcessingHW/SWSystems designinterface[INFO.INFO-ES]Computer Science [cs]/Embedded Systems
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Computer networks stability independence of the queuing delays

2015

Communication in intelligent computer networks is an indispensible attribute of the dataflow quality in Web traffic. We propose a model that investigates intelligent computer networks stability while specifying its limits. Packet queuing delay affects the performance of the network, and especially its stability. If the network is presented as a dynamic system in block diagram form, we compute a transfer function and determine the quasi-polynomial system. The characteristic polynomial distribution of zeros of complex variable quasi-plane determines the boundaries of the network stability. The approach relies on estimation of the network system's transfer functions and its quasi-polynomial. C…

RouterQueueing theorycommunicationbusiness.industryNetwork packetDataflowComputer scienceDistributed computingWeb trafficalgorithmsStability (probability)quasi polynomialsExponential stabilityComputer Science::Networking and Internet ArchitectureQueuing delayqueuing theoryNetwork performancesignal processingbusinessIntelligent computer networksmathematical modelComputer networkFifth International Conference on the Innovative Computing Technology (INTECH 2015)
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A Parallel Face Detection System Implemented on FPGA

2007

In this paper, we introduce a methodology for designing a system for face detection and its implementation on FPGA. The chosen face detection method is the well-known convolutional face finder (CFF) algorithm, which consists in a pipeline of convolutions and subsampling operations. Our goal is to define a parallel architecture able to process efficiently this algorithm. We present a dataflow based architecture algorithm adequation (AAA) methodology implemented using the SynDEx software, in order to find the best compromise between the processing power and functionality requirement of each processor element (PE), and the efficiency of algorithm parallelization. We describe a first implementa…

VirtexSoftwarebusiness.industryDataflowComputer sciencePipeline (computing)Embedded systemFace detectionbusinessField-programmable gate arrayFacial recognition system2007 IEEE International Symposium on Circuits and Systems
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