Search results for "Fpg"
showing 10 items of 131 documents
Cascaded H-Bridges Multielvel Inverters: grid connected advanced applications
Power electronics is going to increase in the modern electrical systems. It is well known that the use of power electronics allows the management and the control of the energy flow, obtaining voltage and current waveforms suitable for electrical loads. In this scenario, multilevel power converters are finding increased attention in industry and academia as one of the promising choices of electronic conversion thanks to their features and many different application fields with high power and medium voltage. Moreover, they are fundamental in interfacing electric grid to high power renewable energy systems (i.e. PV, Wind farm, Biomass, Fuel Cell etc.). Nowadays, the research is focused on the …
An Scalable matrix computing unit architecture for FPGA and SCUMO user design interface
2019
High dimensional matrix algebra is essential in numerous signal processing and machine learning algorithms. This work describes a scalable square matrix-computing unit designed on the basis of circulant matrices. It optimizes data flow for the computation of any sequence of matrix operations removing the need for data movement for intermediate results, together with the individual matrix operations’ performance in direct or transposed form (the transpose matrix operation only requires a data addressing modification). The allowed matrix operations are: matrix-by-matrix addition, subtraction, dot product and multiplication, matrix-by-vector multiplication, and matrix by scalar multiplication.…
Moving Learning Machine Towards Fast Real-Time Applications: A High-Speed FPGA-based Implementation of the OS-ELM Training Algorithm
2018
Currently, there are some emerging online learning applications handling data streams in real-time. The On-line Sequential Extreme Learning Machine (OS-ELM) has been successfully used in real-time condition prediction applications because of its good generalization performance at an extreme learning speed, but the number of trainings by a second (training frequency) achieved in these continuous learning applications has to be further reduced. This paper proposes a performance-optimized implementation of the OS-ELM training algorithm when it is applied to real-time applications. In this case, the natural way of feeding the training of the neural network is one-by-one, i.e., training the neur…
Multiprocessor SoC Implementation of Neural Network Training on FPGA
2008
Software implementations of artificial neural networks (ANNs) and their training on a sequential processor are inefficient because they do not take advantage of parallelism. ASIC and FPGA implementations employ specific hardware structures to exploit parallelism in order to improve processing speed; however, optimizing resource usage requires the use of fixed-point arithmetic, thereby losing precision, and the final system is restricted to a particular network topology. This paper presents a mixed approach based on a multiprocessor system-on-chip (SoC) on a FPGA. The use of software-driven embedded microprocessors with custom floating-point extensions for ANN related functions allows for gr…
Experimental Investigation on the Performances of a Multilevel Inverter Using a Field Programmable Gate Array-Based Control System
2019
The Field Programmable Gate Array (FPGA) represents a valid solution for the design of control systems for inverters adopted in many industry applications, because of both its high flexibility of use and its high-performance with respect to other types of digital controllers. In this context, this paper presents an experimental investigation on the harmonic content of the voltages produced by a three-phase, five level cascaded H-Bridge Multilevel inverter with an FPGA-based control board, aiming also to evaluate the performance of the FPGA through the implementation of the main common modulation techniques and the comparison between simulation and experimental results. The control algorithm…
Smart camera based on an Embedded HW/SW Co-Processor
2008
Abstract This paper describes an image acquisition and a processing system based on a new coprocessor architecture designed for CMOS sensor imaging. The system exploits the full potential CMOS selective access imaging technology because the coprocessor unit is integrated into the image acquisition loop. The acquisition and coprocessing architecture are compatible with the majority of CMOS sensors. It enables the dynamic selection of a wide variety of acquisition modes as well as the reconfiguration and implementation of high-performance image preprocessing algorithms (calibration, filtering, denoising, binarization, pattern recognition). Furthermore, the processing and data transfer, from t…
FPGA-based concurrent watchdog for real-time control systems
2003
A straightforward and efficient implementation of a custom concurrent watchdog processor for real-time control systems is presented. Emphasis is given to the techniques used for on-line checking the main processor activity without adding overhead, and to the advantages of a field programmable gate array implementation.
Echo cancellation system for iso-frequency repeaters : contribution to the development of a new generation digital repeater
2014
On-frequency repeaters are a cost-effective solution to extend coverage and enhance wireless communications, especially in shadow areas. However, coupling between the receiving antenna and the transmitting antenna, called radio frequency echo, increases modulation errors and creates oscillations in the system when the echo power is high. According to the communication standards, extremely weak echoes decrease the transmission rate, while strong echoes damage electroni ccircuits because of power peaks. This thesis aims at characterizing the echo phenomenon under different modulations, and proposing an optimized solution directly integrated to industry. We have turned to digital solutions esp…
A Selective Change Driven System for High-Speed Motion Analysis.
2016
Vision-based sensing algorithms are computationally-demanding tasks due to the large amount of data acquired and processed. Visual sensors deliver much information, even if data are redundant, and do not give any additional information. A Selective Change Driven (SCD) sensing system is based on a sensor that delivers, ordered by the magnitude of its change, only those pixels that have changed most since the last read-out. This allows the information stream to be adjusted to the computation capabilities. Following this strategy, a new SCD processing architecture for high-speed motion analysis, based on processing pixels instead of full frames, has been developed and implemented into a Field …
Iegultā intelekta risinājums heterogenā iegultā sistēmā objektu detektēšanai attēlos
2020
Maģistra darba mērķis ir veikt iegultā intelekta risinājumu izpēti un eksperimentāla risinājumaimplementēšanu heterogenā iegultā sistēmā objektu detektēšanai attēlos.Darbā teorētiski ir aprakstīti heterogēnu iegulto iekārtu un konvolūciju neironu tīklu dar-bības pamatprincipi. Tāpat darbā tiek apskatīti daži populārākie konvolūciju neironu tīkli, kasparedzēti objektu detektēšanai attēlos. Tiek skaidrota to uzbūve un novērtēšanas metodes. Darbapraktiskajā daļā tiek aprakstīta divu dažādu konvolūciju neironu tīklu apmācīšana un uzstādīšanauz heterogēnas iegultās iekārtas, no kuriem viens ir paredzēts attēlu klasificēšanai, bet otrsobjektu detektēšanai attēlos.