Search results for "IP-XACT"
showing 6 items of 6 documents
Enabling partially reconfigurable IP cores parameterisation and integration using MARTE and IP-XACT
2012
International audience; This paper presents a framework which facilitates the parameterization and integration of IP cores into partially reconfigurable SoC platforms, departing from a high-level of abstraction. The approach is based in a Model-Driven Engineering (MDE) methodology, which exploits two widely used standards for Systems-on-Chip specification, MARTE and IP-XACT. The presented work deals with the deployment level of the MDE approach, in which the abstract components of the platform are first linked to the lower level IP-XACT counterparts. At this phase, information for parameterization and integration is readily available, and a synthesizable model can be obtained from the gener…
Modeling RISC-V Processor in IP-XACT
2018
IP-XACT is the most used standard in IP (Intellectual Property) integration. It is intended as a language neutral golden reference, from which RTL and HW dependent SW is automatically generated. Despite its wide popularity in the industry, there are practically no public and open design examples for any part of the design flow from IP-XACT to synthesis. One reason is the difficulty of creating IP-XACT models for existing RTL projects. In this paper, we address the issues by modeling the PULPino RISC-V microprocessor that is written in SystemVerilog (SV) and the project distributed over several repositories. We propose how to solve the mismatching concepts between SV project and IP-XACT, and…
Analysis and Visualization of Product Memory Layout in IP-XACT
2017
Modern ASIC and FPGA based embedded products use model based design, in which both hardware and software are developed in parallel. Previously HW was completed first and the information handed over to SW team, typically in the form of register tables. The information was even manually copied to SW code, making any changes error-prone and laborious. IP-XACT is the most feasible standard to model HW also for the SW needs. The HW design connectivity and overall memory layout may change due to component instantiations, configurations and conditional operation states, which makes it difficult to create register tables even for documentation. Current register design tools fall short in serving th…
An MDE Approach for Rapid Prototyping and Implementation of Dynamic Reconfigurable Systems
2015
This article presents a co-design methodology based on RecoMARTE, an extension to the well-known UML MARTE profile, which is used for the specification and automatic generation of Dynamic and Partially Reconfigurable Systems-on-Chip (DRSoC). This endeavor is part of a larger framework in which Model-Driven Engineering (MDE) techniques are extensively used for modeling and via model transformations, generating executable models, which are exploited by implementation tools to create reconfigurable systems. More specifically, the methodological aspects presented in this article are concerned with expediting the conception and implementation of the hardware platform and the integration of corre…
Méthodologie de conception de haut niveau pour la génération automatique des systèmes dynamiquement reconfigurables en utilisant IP-XACT et le profil…
2013
The main contribution of this thesis consists on the proposition and development a Model-driven Engineering (MDE) framework, in tandem with a component-based approach, for facilitating the design and implementation of Dynamic Partially Reconfigurable (DPR) Systems-on-Chip. The proposed methodology has been constructed around the Metadata-based Composition Framework paradigm, and based on common standards such as UML MARTE and the IEEE IP-XACT standard, an XML representation used for storing metadata about the IPs to be reused and of the platforms to be obtained at high-levels of abstraction. In fact, a componentizing process enables us to reuse the IP blocks, in UML MARTE, by wrapping them …
Facilitating IP deployment in a MARTE-based MDE methodology using IP-XACT: a XILINX EDK case study
2012
International audience; In this paper we present framework for the deployment of hardware IPs at high-levels of abstraction. It is based in a model- driven approach that aims at the automatic generation of Dynamic Partial Reconfiguration designs created in Xilinx Platform Studio (XPS). Contrary to previous approaches, we make use of the IP-XACT standard to facilitate the deployment of hardware IPs, their parameterization and subsequent integration. We propose an extension to the MARTE profile for IP deployment, and we introduce the necessary model transformations to obtain a high- level representation from an IP-XACT component library. These models are then used to create a platform in MART…