Search results for "Integrated circuit"
showing 10 items of 130 documents
Visualization of Memory Map Information in Embedded System Design
2018
Data compression is a common requirement for displaying large amounts of information. The goal is to reduce visual clutter. The approach given in this paper uses an analysis of a data set to construct a visual representation. The visualization is compressed using the address ranges of the memory structure. This method produces a compressed version of the initial visualization, retaining the same information as the original. The presented method has been implemented as a Memory Designer tool for ASIC, FPGA and embedded systems using IP-XACT. The Memory Designer is a user-friendly tool for model based embedded system design, providing access and adjustment of the memory layout from a single v…
A Theory of electrical circuits with resistively coupled distributed structures : Delay time predicting
1988
This paper deals with qualitative properties ( existence, uniqueness, and especially, stability) and numerical solution of a circuit consisting of a resistive multiport with r-c-g "exactly modeled" distributed elements connected to its terminals. This kind of results are useful, for instance, when we study the effect of interconnections on the speed of transient process from an integrated structure. A formula to evaluate the delay time as a global parameter of the circuit is given and verified by numerical calculus. peerReviewed
Chaos and its Degradation-Promoting-Based Control in an Antithetic Integral Feedback Circuit
2022
This letter deals with a novel variant of antithetic integral feedback controller (AIFC) motifs which can feature robust perfect adaptation, a pervasive (desired) ability in natural (synthetic) biomolecular circuits, when coupled with a wide class of process networks to be regulated. Using the separation of timescales in the proposed kind of AIFC, here we find a reducedorder controller that captures the governing slow part of the original solutions under suitable assumptions. Inspired by R(ossler systems, we then make use of such a simpler controller to show that the antithetic circuit can exhibit chaotic behaviors with strange attractors, where the bifurcation from a homeostatic state to c…
Plasmonic Stripes in Aqueous Environment Co-Integrated With Si3N4 Photonics
2018
We demonstrate the design, fabrication, and the experimental characterization of gold-based plasmonic stripes butt-coupled with low-pressure-chemical-vapor-deposition (LPCVD)-based Si3N4 waveguides for the excitation of surface-plasmon-polariton (SPP) modes in aqueous environment. Plasmonic gold stripes, in aqueous environment, with cross-sectional dimensions of 100 nm × 7 μm were interfaced with 360 nm × 800 nm Si3N4 waveguides cladded with low-temperature-oxide, exploiting linear photonic tapers with appropriate vertical (VO) and longitudinal (LO) offsets between the plasmonic and photonic waveguide facets. An interface insertion loss of 2.3 ± 0.3 dB and a plas…
Single Event Transients and Pulse Quenching Effects in Bandgap Reference Topologies for Space Applications
2016
An architectural performance comparison of bandgap voltage reference variants, designed in a $0.18~\mu \text {m}$ CMOS process, is performed with respect to single event transients. These are commonly induced in microelectronics in the space radiation environment. Heavy ion tests (Silicon, Krypton, Xenon) are used to explore the analog single-event transients and have revealed pulse quenching mechanisms in analogue circuits. The different topologies are compared, in terms of cross-section, pulse duration and pulse amplitude. The measured results, and the explanations behind the findings, reveal important guidelines for designing analog integrated circuits, which are intended for space appli…
Latest Developments and Results of Radiation Tolerance CMOS Sensors with Small Collection Electrodes
2020
The development of radiation hard Depleted Monolithic Active Pixel Sensors (DMAPS) targets the replacement of hybrid pixel detectors to meet radiation hardness requirements of at least 1.5e16 1 MeV neq/cm2 for the HL-LHC and beyond. DMAPS were designed and tested in the TJ180 nm TowerJazz CMOS imaging technology with small electrodes pixel designs. This technology reduces costs and provides granularity of 36.4x36.4 um2 with low power operation (1 uW/pixel), low noise of ENC < 20 e-, a small collection electrode (3 um) and fast signal response within 25 ns bunch crossing. This contribution will present the latest developments after the MALTA and Mini-MALTA sensors. It will illustrate the imp…
Exploring students’ identity development from the perspective of study difficulties
2020
This work-in-progress paper in research category reports preliminary findings on how students taking introductory computing courses develop identity from the perspective of study difficulties. The motivation was that students identified lack of meaning and prospects (cf. identity) as a study difficulty in a previous qualitative study. The present study further explores this finding by issuing both an identity development and a self-efficacy scale to a larger first-year student cohort. The aim is to characterize the study cohort by the aspects included in the identity development scale, and thereby increase understandings of students’ challenges. Moreover, a correlation analysis between iden…
Toward Quaternary QCA : Novel Majority and XOR Fuzzy Gates
2022
As an emerging nanotechnology, quantum-dot cellular automata (QCA) has been considered an alternative to CMOS technology that suffers from problems such as leakage current. Moreover, QCA is suitable for multi-valued logic due to the simplicity of implementing fuzzy logic in a way much easier than CMOS technology. In this paper, a quaternary cell is proposed with two isolated layers because of requiring three particles to design this quaternary cell. Moreover, due to the instability of the basic gates, the three particles cannot be placed in one layer. The first layer of the proposed two-layer cell includes a ternary cell and the second one includes a binary cell. It is assumed that the over…
Scheduling under the network of temporo-spatial proximity relationships
2017
We discuss and introduce to the schedulingeld a novel, qualitative optimization model - scheduling under the network of temporo-spatial proximity relationships.We introduce a half perimeter proximity measure as an objective of scheduling.We present and evaluate an incremental Sequence Pair neighborhood evaluation algorithm, applicable to both scheduling and rectangle packing problems in VLSI industry. In this paper, we discuss and introduce to the scheduling field a novel optimization objective - half perimeter proximity measure in scheduling under the network of temporo-spatial proximity relationships. The presented approach enables to qualitatively express various reasons of scheduling ce…
A Stochastic Algorithm Based on Fast Marching for Automatic Capacitance Extraction in Non-Manhattan Geometries
2014
WOS:000346854900026 (Nº de Acesso Web of Science) We present an algorithm for two- and three-dimensional capacitance analysis on multidielectric integrated circuits of arbitrary geometry. Our algorithm is stochastic in nature and as such fully parallelizable. It is intended to extract capacitance entries directly from a pixelized representation of the integrated circuit (IC), which can be produced from a scanning electron microscopy image. Preprocessing and monitoring of the capacitance calculation are kept to a minimum, thanks to the use of distance maps automatically generated with a fast marching technique. Numerical validation of the algorithm shows that the systematic error of the algo…