Search results for "Motherboard"
showing 4 items of 4 documents
Development of the Optical Multiplexer Board Prototype for Data Acquisition in the TileCal System
2006
This paper describes the development of the optical multiplexer board (OMB), also known as PreROD board, for the TileCal readout system in the ATLAS experiment. The aim of this board is to overcome the problems that may arise in the integrity of data due to radiation effects. The solution adopted has been to add redundancy to data transmission and so two optical fibers with the same data come out from the detector front end boards. The OMB has to decide in real time which fiber, eventually, carries data with no errors switching it to the output link connected to the read out driver (ROD) motherboard where data processing takes place. Besides, the board may be also used as a data injector fo…
A Portable Readout System for Microstrip Silicon Sensors (ALIBAVA)
2009
A readout system for microstrip silicon sensors has been developed. This system is able to measure the collected charge in one or two microstrip silicon sensors by reading out all the channels of the sensor(s), up to 256. The system can operate either with non-irradiated and irradiated sensors as well as with n-type and p-type microstrip silicon sensors. Heavily irradiated sensors will be used at the Super Large Hadron Collider, so this system can be used to research the performance of microstrip silicon sensors in conditions as similar as possible to the Super Large Hadron Collider operating conditions. The system has two main parts: a hardware part and a software part. The hardware part a…
Development of the optical multiplexer board prototype for data acquisition in TileCal experiment
2005
The optical multiplexer board is one of the elements present in the read out chain of the tile calorimeter in ATLAS experiment. Due to radiation effects, two optical fibers with the same data come out from the front end boards to this board, which has to decide in real time which one carries good data and pass them to the read out driver motherboard for processing. This paper describes the design and tests of the first prototype, implemented as a 6U VME64x slave module, including both hardware and firmware aspects. In this last, algorithms for cyclic redundancy code checking are used to make the decision. Besides, the board may be used as a data injector for testing purposes of the read out…
A High speed data link optimization for digitalized transfer to processing FPGA
2021
State-of-the-art arrays of detectors, that require digital processing, may have a sizeable number of digitalized signal links. This is the case in several experimental nuclear physics instruments. Moreover, the data rate of the sampled signals, defined primary by the signal bandwidth of the individual detectors, may not exhaust the capabilities of a single FPGA transceiver input. The preprocessing is usually carried out in a modern FPGA with transceiver data rate capabilities over 10Gbps. Moreover, cost effective FPGA have a limited number of transceivers for given FPGA processing capabilities. The investigation of a cost-effective and efficient solution to the mismatch between both data ra…