Search results for "Multiprocessing"

Parallel implementation of a multiscale edges detection algorithm

1996

We present in this paper an implementation of a multiscale edges detection algorithm on multiprocessor using SYnDEx which is a programming environment to generate optimized distributed real-time executives. The implementation has been done on three TMS320C40 and the acceleration in comparison with one processor is 2.2.

Exploring parallel capabilities of an innovative numerical method for recovering image velocity vectors field

2010

In this paper an efficient method devoted to estimate the velocity vectors field is investigated. The method is based on a quasi-interpolant operator and involves a large amount of computation. The operations characterizing the computational scheme are ideal for parallel processing because they are local, regular and repetitive. Therefore, the spatial parallelism of the process is studied to rapidly proceed in the computation on distributed multiprocessor systems. The process has shown to be synchronous, with good task balancing and requiring a small amount of data transfer.

On the systolic calculation of all-pairs interactions using transputer arrays

1991

Multiprocessor SoC Implementation of Neural Network Training on FPGA

2008

Software implementations of artificial neural networks (ANNs) and their training on a sequential processor are inefficient because they do not take advantage of parallelism. ASIC and FPGA implementations employ specific hardware structures to exploit parallelism in order to improve processing speed; however, optimizing resource usage requires the use of fixed-point arithmetic, thereby losing precision, and the final system is restricted to a particular network topology. This paper presents a mixed approach based on a multiprocessor system-on-chip (SoC) on a FPGA. The use of software-driven embedded microprocessors with custom floating-point extensions for ANN related functions allows for gr…

SoC-Based Implementation of the Backpropagation Algorithm for MLP

2008

The backpropagation algorithm used for the training of multilayer perceptrons (MLPs) has a high degree of parallelism and is therefore well-suited for hardware implementation on an ASIC or FPGA. However, most implementations are lacking in generality of application, either by limiting the range of trainable network topologies or by resorting to fixed-point arithmetic to increase processing speed. We propose a parallel backpropagation implementation on a multiprocessor system-on-chip (SoC) with a large number of independent floating-point processing units, controlled by software running on embedded processors in order to allow flexibility in the selection of the network topology to be traine…

Exploring NoC Virtualization Alternatives in CMPs

2012

Chip Multiprocessor systems (CMPs) contain more and more cores in every new generation. However, applications for these systems do not scale at the same pace. Thus, in order to obtain a good utilization several applications will need to coexist in the system and in those cases virtualization of the CMP system will become mandatory. In this paper we analyze two virtualization strategies at NoC-level aiming to isolate the traffic generated by each application to reduce or even eliminate interferences among messages belonging to different applications. The first model handles most interferences among messages with a virtual-channels (VCs) implementation minimizing both execution time and netwo…

A mixed geometric-systolic approach to parallel molecular dynamics simulations

1995

We have developed a flexible and efficient method of performing molecular dynamics simulations on distributed memory parallel computers. The novel feature is to use simultaneously spatial partitioning and systolic loop approaches according to a strategy which, for a given simulation, adapts itself to the multiprocessor system, allowing to approach optimal performance. The method assures high efficiencies even in situations in which, due to the exceeding large number of processors, the usage of a pure spatial decomposition would be impossible. The algorithm provides as particular cases both the pure spatial partitioning and the pure systolic parallelization schemes, so that its adoption assu…

Handling precedence constraints in scheduling problems by the sequence pair representation

2015

In this paper, we show that sequence pair (SP) representation, primarily applied to the rectangle packing problems appearing in the VLSI industry, can be a solution representation of precedence constrained scheduling. We present three interpretations of sequence pair, which differ in complexity of schedule evaluation and size of a corresponding solution space. For each interpretation we construct an incremental precedence constrained SP neighborhood evaluation algorithm, computing feasibility of each solution in the insert neighborhood in an amortized constant time per examined solution, and prove the connectivity property of the considered neighborhoods. To compare proposed interpretations…

A dynamic load-balancing algorithm for molecular dynamics simulation on multi-processor systems

1991

Abstract A new algorithm for dynamic load-balancing on multi-processor systems and its application to the molecular dynamics simulation of the spinodal phase separation are presented. The load-balancer is distributed among the processors and embedded in the application itself. Tests performed on a transputer network show that the load-balancer behaves almost ideally in this application. The same approach can be easily extended to different multi-processor topologies or applications.

Parallelization of the Wolff single-cluster algorithm.

2010

A parallel [open multiprocessing (OpenMP)] implementation of the Wolff single-cluster algorithm has been developed and tested for the three-dimensional (3D) Ising model. The developed procedure is generalizable to other lattice spin models and its effectiveness depends on the specific application at hand. The applicability of the developed methodology is discussed in the context of the applications, where a sophisticated shuffling scheme is used to generate pseudorandom numbers of high quality, and an iterative method is applied to find the critical temperature of the 3D Ising model with a great accuracy. For the lattice with linear size L=1024, we have reached the speedup about 1.79 times …