Search results for "Stuck"
showing 10 items of 25 documents
A review of multiple faults diagnosis methods in Voltage Source Inverters
2015
This paper examines, as in short review, the methods of diagnosis of simple and multiple faults on Voltage Source Inverter (VSI). The methods examined here are essentially based on the inspection of the load currents. Some of these diagnosis methods are characterized by low computational effort, other for a better reliability avoiding faultless positive tests. Some solutions are characterized by a share of these benefits while others prefer an enforcement of trustworthiness, in spite of the lower calculation amount. The analysis of the technical literature, certainly, offers a glimpse about the creation of new algorithms and significant advances for the future.
A Geometrical Simple Approach for Power Silicon Devices Fault Detection and Fault-Tolerant Operation of a Voltage Source Inverter
2012
Fault-tolerant converters have been widely investigated for years and nowadays an extensive technical literature on this field exists. This paper presents a novel fault detection algorithm based on a simple geometrical approach. In the algorithm analysis both the case of faults in single device and the lose of an entire inverter leg have been considered. False positive detections are avoided by considering a proper number of current samples. The proposed fault detection algorithm is characterized by simplicity, low computational and implementation effort with a consequent enough fast execution, easy control integration with the possibility to use it both in hardware in the loop systems and …
Neutron-Induced Effects on a Self-Refresh DRAM
2022
International audience; The field of radiation effects in electronics research includes unknowns for every new device, node size, and technical development. In this study, static and dynamic test methods were used to define the response of a self-refresh DRAM under neutron irradiation. The neutron-induced effects were investigated and characterised by event cross sections, soft-error rate, and bitmaps evaluations, leading to an identification of permanent and temporary stuck cells, single-bit upsets, and block errors. Block errors were identified in different patterns with dependency in the addressing order, leading to up to two thousand faulty words per event, representing a real threat fr…
Technology Impact on Neutron-Induced Effects in SDRAMs : A Comparative Study
2021
International audience; This study analyses the response of synchronous dynamic random access memories to neutron irradiation. Three different generations of the same device with different node sizes (63, 72, and 110 nm) were characterized under an atmospheric-like neutron spectrum at the ChipIr beamline in the Rutherford Appleton Laboratories, UK. The memories were tested with a reduced refresh rate to expose more single-event upsets and under similar conditions provided by a board specifically developed for this type of study in test facilities. The board has also been designed to be used as a nanosatellite payload in order to perform similar tests. The neutron-induced failures were studi…
Electron-Induced Upsets and Stuck Bits in SDRAMs in the Jovian Environment
2021
This study investigates the response of synchronous dynamic random access memories to energetic electrons and especially the possibility of electrons to cause stuck bits in these memories. Three different memories with different node sizes (63, 72, and 110 nm) were tested. Electrons with energies between 6 and 200 MeV were used at RADiation Effects Facility (RADEF) in Jyvaskyla, Finland, and at Very energetic Electron facility for Space Planetary Exploration missions in harsh Radiative environments (VESPER) in The European Organization for Nuclear Research (CERN), Switzerland. Photon irradiation was also performed in Jyvaskyla. In these irradiation tests, stuck bits originating from electro…
Stuck at work? Quantitative proteomics of environmental wine yeast strains reveals the natural mechanism of overcoming stuck fermentation
2015
During fermentation oenological yeast cells are subjected to a number of different stress conditions and must respond rapidly to the continuously changing environment of this harsh ecological niche. In this study we gained more insights into the cell adaptation mechanisms by linking proteome monitoring with knowledge on physiological behaviour of different strains during fermentation under model winemaking conditions. We used 2D-DIGE technology to monitor the proteome evolution of two newly discovered environmental yeast strains Saccharomyces bayanus and triple hybrid Saccharomyces cerevisiae × Saccharomyces kudriavzevii × S. bayanus and compared them to data obtained for the commercially a…
I luoghi del sacro nella città contemporanea. Due “installazioni permanenti” di Maria Dompè e Silvia Stucky per il giardino dei Padri Passionisti all…
2015
An Exemplary Model Study for Overcoming Stuck Fermentation during Spontaneous Fermentation with the Aid of a Saccharomyces Triple Hybrid
2015
Sluggish or stuck fermentations cause significant financial losses for winemakers each year. In order to investigate the reasons for problems during spontaneous fermentation of Riesling must in a well-known German vineyard of the lower Moselle, yeast strains involved in must fermentation were identified during winemaking in the two years 2011 and 2012. Identification of the yeast isolates was performed by applying analyses of the ITS-1-5.8-ITS2 region and restriction fragment analyses of different gene sequences. It revealed that Saccharomyces (S.) bayanus and not Saccharomyces cerevisiae was the main fermenting yeast. Either S. bayanus finished the fermentation or led to stuck fermentation…
Analysis of the influence of processor hidden registers on the accuracy of fault injection techniques
2004
Modern processors tend to increase the number of registers, being part of them not accessible by the instruction set. Traditionally, the effect of faults in these hidden registers has not been considered during system validation using fault injection. In this paper, a study of the importance of faults in hidden registers is performed. Firstly, we have analysed the sensitivity of hidden registers to faults in combinational logic. In a second phase, we have analysed the impact of the faults occurred in hidden registers on system behaviour. A broad set of permanent and transient faults have been injected into the models of two typical commercial microcontrollers, using a VHDL-based fault injec…
Comprehensive Modeling and Experimental Testing of Fault Detection and Management of a Nonredundant Fault-Tolerant VSI
2015
This paper presents an investigation and a comprehensive analysis on fault operations in a conventional three-phase voltage source inverter. After an introductory section dealing with power converter reliability and fault analysis issues in power electronics, a generalized switching function accounting for both healthy and faulty conditions and an easy and feasible method to embed fault diagnosis and reconfiguration within the control algorithm are introduced. The proposed system has simple and compact implementation. Experimental results operating both at open- and closed-loop current control, obtained using a test bench realized using a dSPACE system and the fault-tolerant inverter protot…