Search results for "arithmetic"
showing 10 items of 271 documents
ADDITIVITY FROM MULTIPLE PRIMES IN IDENTIFYING BACKWARD WRITTEN WORDS
1988
Activational theories of memory assume that activation from several sources adds up to an intersecting node. We tested this idea in one experiment where we kept constant the number of primes presented and we manipulated the number of different primes related to the target, the number of presentations of the same prime, or the same target, presented as a prime. We used a task in which the target was always a word, which appeared written backward and had to be identified. We found a strong effect of target repetition and diminished priming in the condition in which the target was repeated. We obtained additivity (greater activation) mainly in the condition in which we presented several diffe…
Encoding numbers: behavioral evidence for processing-specific representations.
2006
The aim of this study was to test the hypothesis of a complex encoding of numbers according to which each numerical processing requires a specific representational format for input. In three experiments, adult participants were given two numbers presented successively on screen through a self-presentation procedure after being asked to add, to subtract, or to compare them. We considered the self-presentation time of the first number as reflecting the complexity of the encoding for a given planned processing. In line with Dehaene's triple-code model, self-presentation times were longer for additions and subtractions than for comparisons with two-digit numbers but longer for subtractions than…
Linear-size suffix tries
2016
Suffix trees are highly regarded data structures for text indexing and string algorithms [MCreight 76, Weiner 73]. For any given string w of length n = | w | , a suffix tree for w takes O ( n ) nodes and links. It is often presented as a compacted version of a suffix trie for w, where the latter is the trie (or digital search tree) built on the suffixes of w. Here the compaction process replaces each maximal chain of unary nodes with a single arc. For this, the suffix tree requires that the labels of its arcs are substrings encoded as pointers to w (or equivalent information). On the contrary, the arcs of the suffix trie are labeled by single symbols but there can be Θ ( n 2 ) nodes and lin…
An Scalable matrix computing unit architecture for FPGA and SCUMO user design interface
2019
High dimensional matrix algebra is essential in numerous signal processing and machine learning algorithms. This work describes a scalable square matrix-computing unit designed on the basis of circulant matrices. It optimizes data flow for the computation of any sequence of matrix operations removing the need for data movement for intermediate results, together with the individual matrix operations’ performance in direct or transposed form (the transpose matrix operation only requires a data addressing modification). The allowed matrix operations are: matrix-by-matrix addition, subtraction, dot product and multiplication, matrix-by-vector multiplication, and matrix by scalar multiplication.…
Gray visiting Motzkins
2002
We present the first Gray code for Motzkin words and their generalizations: k colored Motzkin words and Schroder words. The construction of these Gray codes is based on the observation that a k colored Motzkin word is the shuffle of a Dyck word by a k-ary variation on a trajectory which is a combination. In the final part of the paper we give some algorithmic considerations and other possible applications of the techniques introduced here.
On the Quantum and Classical Complexity of Solving Subtraction Games
2019
We study algorithms for solving Subtraction games, which are sometimes referred as one-heap Nim games.
Multiprocessor SoC Implementation of Neural Network Training on FPGA
2008
Software implementations of artificial neural networks (ANNs) and their training on a sequential processor are inefficient because they do not take advantage of parallelism. ASIC and FPGA implementations employ specific hardware structures to exploit parallelism in order to improve processing speed; however, optimizing resource usage requires the use of fixed-point arithmetic, thereby losing precision, and the final system is restricted to a particular network topology. This paper presents a mixed approach based on a multiprocessor system-on-chip (SoC) on a FPGA. The use of software-driven embedded microprocessors with custom floating-point extensions for ANN related functions allows for gr…
Automatic construction of test sets: Theoretical approach
2005
We consider the problem of automatic construction of complete test set (CTS) from program text. The completeness criterion adopted is C1, i.e., it is necessary to execute all feasible branches of program at least once on the tests of CTS. A simple programming language is introduced with the property that the values used in conditional statements are not arithmetically deformed. For this language the CTS problem is proved to be algorithmically solvable and CTS construction algorithm is obtained. Some generalizations of this language containing counters, stacks or arrays are considered where the CTS problem remains solvable. In conclusion the applications of the obtained results to CTS constr…
A GPU-Based DVC to H.264/AVC Transcoder
2010
Mobile to mobile video conferencing is one of the services that the newest mobile network operators can offer to users With the apparition of the distributed video coding paradigm which moves the majority of complexity from the encoder to the decoder, this offering can be achieved by introducing a transcoder This device has to convert from the distributed video coding paradigm to traditional video coding such as H.264/AVC which is formed by simpler decoders and more complex encoders, and allows to the users to execute only the low complex algorithms In order to deal with this high complex video transcoder, this paper introduces a graphics processing unit based transcoder as base station The…