Search results for "embedded systems"

An embedded datalogger with a fast acquisition rate for in-vehicle testing and monitoring

2011

A very compact and high performance datalogger for automotive in-vehicle testing is here described. The small logger dimensions and the availability of a CAN interface allows to easily implement multiple and distributed acquisition schemes, very challenging with traditional instrumentation. High acquisition rate, up to 100 Ksps/ch, and low cost was obtained through a very accurate hardware and software design.

Knowledge-based verification of concatenative programming patterns inspired by natural language for resource-constrained embedded devices

2020

We propose a methodology to verify applications developed following programming patterns inspired by natural language that interact with physical environments and run on resource-constrained interconnected devices. Natural language patterns allow for the reduction of intermediate abstraction layers to map physical domain concepts into executable code avoiding the recourse to ontologies, which would need to be shared, kept up to date, and synchronized across a set of devices. Moreover, the computational paradigm we use for effective distributed execution of symbolic code on resource-constrained devices encourages the adoption of such patterns. The methodology is supported by a rule-based sys…

Smart camera based on an Embedded HW/SW Co-Processor

2008

Abstract This paper describes an image acquisition and a processing system based on a new coprocessor architecture designed for CMOS sensor imaging. The system exploits the full potential CMOS selective access imaging technology because the coprocessor unit is integrated into the image acquisition loop. The acquisition and coprocessing architecture are compatible with the majority of CMOS sensors. It enables the dynamic selection of a wide variety of acquisition modes as well as the reconfiguration and implementation of high-performance image preprocessing algorithms (calibration, filtering, denoising, binarization, pattern recognition). Furthermore, the processing and data transfer, from t…

A novel methodology for accelerating bitstream relocation in partially reconfigurable systems

2012

International audience; Xilinx Virtex FPGAs offer the possibility of Partial Reconfiguration (PR). Arbitrary tasks can be allocated and de-allocated onto FPGA without system interruption. However, mapping a task to any available PR region requires a unique partial bitstream for each partition, hence reducing memory storage requirements. In recent years, an interest on overcoming this problem has lead to the concept of Partial Bitstream Relocation (PBR). The principle is to perform bitstream modification to map it to different regions. However, PBR consumes scarce resources in hardware implementations, and introduces a prohibitive time overhead when done in software. In order to find the bes…

Dynamic scheduling of periodic skippable tasks in an overloaded real-time system

2008

International audience; The need for supporting dynamic real-time environments where changes in workloads may occur requires a scheduling framework that explicitly addresses overload conditions, allows the system to achieve graceful degradation and supports a mechanism capable of determining the load to be shed from the system to handle the overload. In applications ranging from video reception to air-craft control, tasks enter periodically and have response time constraints, but missing a deadline is acceptable, provided most deadlines are met. Such tasks are said to be occasionally skippable and have an assigned skip parameter. We look at the problem of uniprocessor scheduling of skippabl…

SYSTEMES DE VISION INTELLIGENTS : ADEQUATION ARCHITECTURE ALGORITHME, CONCEPTION ET IMPLANTATION MATERIELLES

2013

Smart Vision systems: adequacy architecture algorithm, design and hardware implementations

2013

A platform for the development and the validation of HW IP components starting from reference software specifications

2008

Abstract Signal processing algorithms become more and more efficient as a result of the developments of new standards. It is particularly true in the field video compression. However, at each improvement in efficiency and functionality, the complexity of the algorithms is also increasing. Textual specifications, that in the past were the original form of specifications, have been substituted by reference software which became the starting point of any design flow leading to implementation. Therefore, designing an embedded application has become equivalent to port a generic software on a, possibly heterogeneous, embedded platform. Such operation is getting more and more difficult because of …

Improving user experience via motion sensors in an Ambient Intelligence scenario

2013

Ambient Intelligence (AmI) is a new paradigm in Artificial Intelligence that aims at exploiting the information about the environment state in order to adapt it to the user preferences. AmI systems are usually based on several cheap and unobtrusive sensing devices that allow for continuous monitoring in different scenarios. In this work we present a gesture recognition module for the management of an office environment using a motion sensor device, namely Microsoft Kinect, as the primary interface between the user and the AmI system. The proposed gesture recognition method is based on both RGB and depth information for detecting the hand of the user and a fuzzy rule for determining the stat…

Neutron-Induced Effects on a Self-Refresh DRAM

2022

International audience; The field of radiation effects in electronics research includes unknowns for every new device, node size, and technical development. In this study, static and dynamic test methods were used to define the response of a self-refresh DRAM under neutron irradiation. The neutron-induced effects were investigated and characterised by event cross sections, soft-error rate, and bitmaps evaluations, leading to an identification of permanent and temporary stuck cells, single-bit upsets, and block errors. Block errors were identified in different patterns with dependency in the addressing order, leading to up to two thousand faulty words per event, representing a real threat fr…