Search results for "fp"

An Scalable matrix computing unit architecture for FPGA and SCUMO user design interface

2019

High dimensional matrix algebra is essential in numerous signal processing and machine learning algorithms. This work describes a scalable square matrix-computing unit designed on the basis of circulant matrices. It optimizes data flow for the computation of any sequence of matrix operations removing the need for data movement for intermediate results, together with the individual matrix operations’ performance in direct or transposed form (the transpose matrix operation only requires a data addressing modification). The allowed matrix operations are: matrix-by-matrix addition, subtraction, dot product and multiplication, matrix-by-vector multiplication, and matrix by scalar multiplication.…

Moving Learning Machine Towards Fast Real-Time Applications: A High-Speed FPGA-based Implementation of the OS-ELM Training Algorithm

2018

Currently, there are some emerging online learning applications handling data streams in real-time. The On-line Sequential Extreme Learning Machine (OS-ELM) has been successfully used in real-time condition prediction applications because of its good generalization performance at an extreme learning speed, but the number of trainings by a second (training frequency) achieved in these continuous learning applications has to be further reduced. This paper proposes a performance-optimized implementation of the OS-ELM training algorithm when it is applied to real-time applications. In this case, the natural way of feeding the training of the neural network is one-by-one, i.e., training the neur…

Multiprocessor SoC Implementation of Neural Network Training on FPGA

2008

Software implementations of artificial neural networks (ANNs) and their training on a sequential processor are inefficient because they do not take advantage of parallelism. ASIC and FPGA implementations employ specific hardware structures to exploit parallelism in order to improve processing speed; however, optimizing resource usage requires the use of fixed-point arithmetic, thereby losing precision, and the final system is restricted to a particular network topology. This paper presents a mixed approach based on a multiprocessor system-on-chip (SoC) on a FPGA. The use of software-driven embedded microprocessors with custom floating-point extensions for ANN related functions allows for gr…

Evaluating a Future Remote Control Environment with an Experience-Driven Science Fiction Prototype

2015

The case study presented in this paper aimed at discovering opportunities for ambient intelligence and new interaction methods for a future remote crane-operating environment. The theoretical objective was to carry out an experience-driven research project in an industrial work context, and the practical objective was to create and evaluate a future oriented science fiction prototype. The work was carried out in close co-operation with an industrial partner who was a domain expert in the field of crane industry. The aim was to focus on clearly defined user experience goals to which the industrial partner committed. The consequent immediate objective was to focus on two explicit experiences …

Transformations that preserve learnability

1996

We consider transformations (performed by general recursive operators) mapping recursive functions into recursive functions. These transformations can be considered as mapping sets of recursive functions into sets of recursive functions. A transformation is said to be preserving the identification type I, if the transformation always maps I-identifiable sets into I-identifiable sets.

Experimental Investigation on the Performances of a Multilevel Inverter Using a Field Programmable Gate Array-Based Control System

2019

The Field Programmable Gate Array (FPGA) represents a valid solution for the design of control systems for inverters adopted in many industry applications, because of both its high flexibility of use and its high-performance with respect to other types of digital controllers. In this context, this paper presents an experimental investigation on the harmonic content of the voltages produced by a three-phase, five level cascaded H-Bridge Multilevel inverter with an FPGA-based control board, aiming also to evaluate the performance of the FPGA through the implementation of the main common modulation techniques and the comparison between simulation and experimental results. The control algorithm…

2018

This study investigated participants’ conceptions of the ideal mentor and mentee in the Finnish model of peer-group mentoring (PGM). Existing mentoring research emphasises dyadic practices, yet the...

Smart camera based on an Embedded HW/SW Co-Processor

2008

Abstract This paper describes an image acquisition and a processing system based on a new coprocessor architecture designed for CMOS sensor imaging. The system exploits the full potential CMOS selective access imaging technology because the coprocessor unit is integrated into the image acquisition loop. The acquisition and coprocessing architecture are compatible with the majority of CMOS sensors. It enables the dynamic selection of a wide variety of acquisition modes as well as the reconfiguration and implementation of high-performance image preprocessing algorithms (calibration, filtering, denoising, binarization, pattern recognition). Furthermore, the processing and data transfer, from t…

FPGA-based concurrent watchdog for real-time control systems

2003

A straightforward and efficient implementation of a custom concurrent watchdog processor for real-time control systems is presented. Emphasis is given to the techniques used for on-line checking the main processor activity without adding overhead, and to the advantages of a field programmable gate array implementation.

Labor Productivity Growth: Disentangling Technology and Capital Accumulation

2014

We adopt a counterfactual approach to decompose labor productivity growth into growth of Technological Productivity (TEP), growth of the capital-labor ratio and growth of Total Factor Productivity (TFP). We bring the decomposition to the data using international countrysectoral information spanning from the 1960s to the 2000s and a nonparametric generalized kernel method, which enables us to estimate the production function allowing for heterogeneity across all relevant dimensions: countries, sectors and time. As well as documenting substantial heterogeneity across countries and sectors, we nd average TEP to account for about 44% of labor productivity growth and TEP gaps with respect to the…