Search results for "fpga"

showing 10 items of 129 documents

Nanoseconds Timing System Based on IEEE 1588 FPGA Implementation

2019

Clock synchronization procedures are mandatory in most physical experiments where event fragments are readout by spatially dislocated sensors and must be glued together to reconstruct key parameters (e.g. energy, interaction vertex etc.) of the process under investigation. These distributed data readout topologies rely on an accurate time information available at the frontend, where raw data are acquired and tagged with a precise timestamp prior to data buffering and central data collecting. This makes the network complexity and latency, between frontend and backend electronics, negligible within upper bounds imposed by the frontend data buffer capability. The proposed research work describ…

EthernetFOS: Computer and information sciencesNuclear and High Energy PhysicsEye diagram; field-programmable gate arrays (FPGAs); front-end electronics; hardware; synchronization; timing systemfront-end electronicEye diagramtiming systemSerial communicationData bufferNetwork topology01 natural sciencesClock synchronizationNOComputer Science - Networking and Internet ArchitecturePE2_20103 physical sciencesSynchronization (computer science)hardwareElectrical and Electronic EngineeringNetworking and Internet Architecture (cs.NI)010308 nuclear & particles physicsbusiness.industrySettore FIS/01 - Fisica Sperimentalefront-end electronicsNuclear Energy and Engineeringfield-programmable gate arrays (FPGAs)Precision Time ProtocolbusinesssynchronizationComputer hardwareData link layer
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FPGA-based concurrent watchdog for real-time control systems

2003

A straightforward and efficient implementation of a custom concurrent watchdog processor for real-time control systems is presented. Emphasis is given to the techniques used for on-line checking the main processor activity without adding overhead, and to the advantages of a field programmable gate array implementation.

Coprocessorbusiness.industryComputer scienceFPGA Fault tolerant systemsSettore ING-INF/01 - ElettronicaProgrammable logic arrayConcurrency controlReal-time Control SystemEmbedded systemControl systemOverhead (computing)Digital controlElectrical and Electronic EngineeringbusinessField-programmable gate arrayElectronics Letters
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An MDE Approach for Rapid Prototyping and Implementation of Dynamic Reconfigurable Systems

2015

This article presents a co-design methodology based on RecoMARTE, an extension to the well-known UML MARTE profile, which is used for the specification and automatic generation of Dynamic and Partially Reconfigurable Systems-on-Chip (DRSoC). This endeavor is part of a larger framework in which Model-Driven Engineering (MDE) techniques are extensively used for modeling and via model transformations, generating executable models, which are exploited by implementation tools to create reconfigurable systems. More specifically, the methodological aspects presented in this article are concerned with expediting the conception and implementation of the hardware platform and the integration of corre…

IP ReuseComputer scienceIP-XACT02 engineering and technologyDiscrete Controller Synthesis020204 information systemsIP-XACTVHDLPartial Reconfiguration0202 electrical engineering electronic engineering information engineeringCAD[ INFO.INFO-ES ] Computer Science [cs]/Embedded SystemsElectrical and Electronic EngineeringField-programmable gate arrayFPGAcomputer.programming_languagebusiness.industrySystem GenerationControl reconfigurationcomputer.file_formatComputer Graphics and Computer-Aided DesignAutomationUML MARTE020202 computer hardware & architectureComputer Science Applications[INFO.INFO-ES] Computer Science [cs]/Embedded SystemsModel Driven EngineeringEmbedded system[INFO.INFO-ES]Computer Science [cs]/Embedded SystemsExecutableModel-driven architecturebusinesscomputer
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Compact instrumentation for radiation tolerance test of flash memories in space environment

2010

Aim of this work is the description of a test equipment, designed to be integrated on board of a microsatellite, able to investigate the radiation tolerance of non-volatile memory arrays in a real flight experiment. An FPGA-based design was adopted to preserve a high flexibility degree. Besides standard Program/Read/Erase functions, additional features such as failure data screening and latch-up protection have been implemented. The instrument development phase generated, as a by-product, a non-rad-hard version of the instrument that allowed performing in-situ experiments using 60Co and 10 MeV Boron irradiation facilities on Ground. Preliminary measurement results are reported to show the i…

EngineeringTolerance analysisbusiness.industrySystem testingSettore ING-INF/01 - ElettronicaFlash memorySpace equipmentNon-volatile memoryNon-volatile memoryFPGA-based instrumentationRadiation hardneInstrumentation (computer programming)businessField-programmable gate arrayRadiation hardeningInstrumentationComputer hardwareSpace environment
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An Efficient Hardware implementation of MQ Decoder of JPEG2000

2014

International audience; JPEG2000 is an international standard for still images intended to overcome the shortcomings of the existing JPEG standard. Compared to JPEG image compression techniques, JPEG2000 standard has not only better not only has better compression ratios, but it also offers some exciting features. As it's hard to meet the real-time requirement of image compression systems by software, it is necessary to implement compression system by hardware. The MQ decoder of the JPEG2000 standard is an important bottleneck for real-time applications. In order to meet the real-time requirement we propose in this paper a novel architecture for a MQ decoder with high throughput which is co…

Implementation[INFO.INFO-ES]Computer Science [cs]/Embedded Systems[ INFO.INFO-ES ] Computer Science [cs]/Embedded SystemsMQ-decoderJPEG-2000FPGA[INFO.INFO-ES] Computer Science [cs]/Embedded Systems
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A Novel Bio-Inspired Approach for High-Performance Management in Service-Oriented Networks

2021

Service-continuity in distributed computing can be enhanced by designing self-organized systems, with a non-fixed structure, able to modify their structure and organization, as well as adaptively react to internal and external environment changes. In this paper, an architecture exploiting a bio-inspired management approach, i.e., the functioning of cell metabolism, for specialized computing environments in Service-Oriented Networks (SONs) is proposed. Similar to the processes acting in metabolic networks, the nodes communicate to each other by means of stimulation or suppression chains giving rise to emergent behaviors to defend against foreign invaders, attacks, and malfunctioning. The mai…

maximum intensity projectionPerformance managementComputer sciencebio-inspired networksDistributed computingbio-inspired networks FPGA technology high-performance management Service-oriented networksbio-inspired networks; biomedical imaging; cerebral vascular tree reconstruction; FPGA technology; high-performance management; magnetic resonance angiography; maximum intensity projection; Service-oriented networksSoftwareGate arrayRobustness (computer science)Factor (programming language)Computer Science (miscellaneous)ArchitectureField-programmable gate arrayhigh-performance managementcomputer.programming_languagebusiness.industrymagnetic resonance angiographyComputer Science ApplicationsHuman-Computer InteractionTree (data structure)FPGA technologycerebral vascular tree reconstructionbiomedical imagingService-oriented networksbusinesscomputerInformation SystemsIEEE Transactions on Emerging Topics in Computing
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Remote programming of network robots within the UJI Industrial Robotics Telelaboratory: FPGA vision and SNRP network protocol

2009

This paper presents the UJI Industrial Robotics Telelaboratory, which lets Ph.D. and Master’s degree students perform robotics and computer vision tele-experiments. By using this system, students are able to program experiments remotely via the Web, in order to combine the use of a field-programmable gate array (FPGA) to provide real-time vision processing, a conveyor belt, and a Motoman industrial manipulator. This paper introduces the novel SNRP protocol (i.e., Simple Network Robot Protocol), which permits the integration of network robots and sensors within an e-learning platform in a simple and reliable manner. As long as the students are able to interact remotely with a real robotic sc…

EngineeringMachine visionDistributed systemsRobots industrialsRobots IndustrialVisió per ordinador -- Aplicacions industrialsElectrical and Electronic EngineeringProtocol (object-oriented programming)e-learningNetwork architectureTeleroboticsbusiness.industryLocal area networkRoboticsarray (FPGA) visionInternet in educationEnsenyament virtualmultirobot programmingControl and Systems Engineeringhigh-performance field-programmable gateEmbedded systemRobotComputer visioninternetArtificial intelligencebusinessCommunications protocol:Informàtica::Robòtica [Àrees temàtiques de la UPC]industrial robotics telelaboratory
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An Embedded Biometric Sensor for Ubiquitous Authentication

2013

Communication networks and distributed technologies move people towards the era of ubiquitous computing. An ubiquitous environment needs many authentication sensors for users recognition, in order to provide a secure infrastructure for both user access to resources and services and information management. Today the security requirements must ensure secure and trusted user information to protect sensitive data resource access and they could be used for user traceability inside the platform. Conventional authentication systems, based on username and password, are in crisis since they are not able to guarantee a suitable security level for several applications. Biometric authentication systems…

PasswordInformation managementUser informationSettore ING-INF/05 - Sistemi Di Elaborazione Delle InformazioniAuthenticationEngineeringUbiquitous computingBiometricsTraceabilitybusiness.industry FPGA rapid prototypingBiometric identity managementFingerprintSelf-contained sensorUbiquitous authenticationIdentity managementEmbedded systembusinessEmbedded system
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Movement Detection with Event-Based Cameras: Comparison with Frame-Based Cameras in Robot Object Tracking Using Powerlink Communication

2018

Event-based cameras are not common in industrial applications despite the fact that they can add multiple advantages for applications with moving objects. In comparison with frame-based cameras, the amount of generated data is very low while keeping the main information in the scene. For an industrial environment with interconnected systems, data reduction becomes very important to avoid network congestion and provide faster response time. However, the use of new sensors as event-based cameras is not common since they do not usually provide connectivity to industrial buses. This work develops a network node based on a Field Programmable Gate Array (FPGA), including data acquisition and trac…

event-based cameraComputer Networks and CommunicationsComputer scienceReal-time computinglcsh:TK7800-836002 engineering and technologyData acquisitionControl theoryRobustness (computer science)0202 electrical engineering electronic engineering information engineeringPowerlink busElectrical and Electronic Engineeringobject trackingEnginyeria elèctricaPowerlink FPGA controlled nodeInverse kinematicsEvent (computing)Node (networking)lcsh:Electronics020208 electrical & electronic engineeringFrame (networking)two-axis robotevent-based processingHardware and ArchitectureControl and Systems EngineeringVideo trackingSignal ProcessingRobot020201 artificial intelligence & image processingRobotsElectronics
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NoC based virtualized FPGA as cloud Services

2016

International audience; Web-based applications are increasingly demanding many computationally intensive services. On the other hand, FPGA-based hardware accelerators(HwAcc) provide good performance in accelerating computationally intensive applications. In addition, some FPGAs support a dynamic partial reconfig-uration (DPR) techniques to virtualize and share the FPGA underlying hardware resources in time multiplexing during run-time to save resource and power consumption. Integrating FPGA in a cloud environment is an indispensable way to improve efficiency and provide acceleration services to demanding users. More importantly, in recent years it was proved that FPGA resources deployed in …

[ INFO.INFO-DC ] Computer Science [cs]/Distributed Parallel and Cluster Computing [cs.DC][INFO.INFO-DC] Computer Science [cs]/Distributed Parallel and Cluster Computing [cs.DC]Virtualized FPGA[INFO.INFO-ES]Computer Science [cs]/Embedded Systems[ INFO.INFO-ES ] Computer Science [cs]/Embedded Systems[INFO.INFO-DC]Computer Science [cs]/Distributed Parallel and Cluster Computing [cs.DC]Cloud ComputingNetwork-on-Chip[INFO.INFO-ES] Computer Science [cs]/Embedded SystemsHard- ware accelerators
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