Search results for "fpga"
showing 10 items of 129 documents
An Embedded Processor for Metabolic Networks Optimization
2011
In recent years biological processes modelling and simulation have become two key issues in analyzing complex cellular systems. The computational requirements suggest to investigate alternative solutions to the common supercomputers and clusters in order to optimize and overcome computational bottleneck. The goal of this work is the design and the realization of an embedded processor for metabolic networks optimization in order to examine their behaviour and robustness under malfunctions of one or more nodes. The embedded processor has been prototyped on the Celoxica RC203E board, equipped with programmable FPGA technologies. A case studied outlining the E. Coli bacteria metabolic network i…
Design and Implementation of an Efficient Fingerprint Features Extractor
2014
Biometric recognition systems are rapidly evolving technologies and their use in embedded devices for accessing and managing data and resources is a very challenging issue. Usually, they are composed of three main modules: Acquisition, Features Extraction and Matching. In this paper the hardware design and implementation of an efficient fingerprint features extractor for embedded devices is described. The proposed architecture, designed for different acquisition sensors, is composed of four blocks: Image Pre-processor, Macro-Features Extractor, Micro- Features Extractor and Master Controller. The Image Pre- processor block increases the quality level of the input raw image and performs an a…
An Embedded, FPGA-based Computer Graphics Coprocessor with Native Geometric Algebra Support
2009
The representation of geometric objects and their transformation are the two key aspects in computer graphics applications. Traditionally, computer-intensive matrix calculations are involved in modeling and rendering three-dimensional (3D) scenery. Geometric algebra (aka Clifford algebra) is attracting attention as a natural way to model geometric facts and as a powerful analytical tool for symbolic calculations. In this paper, the architecture of Clifford coprocessor (CliffoSor) is introduced. CliffoSor is an embedded parallel coprocessing core that offers direct hardware support to Clifford algebra operators. A prototype implementation on a programmable gate array (FPGA) board is detailed…
A Dual-Core Coprocessor with Native 4D Clifford Algebra Support
2012
Geometric or Clifford Algebra (CA) is a powerful mathematical tool that is attracting a growing attention in many research fields such as computer graphics, computer vision, robotics and medical imaging for its natural and intuitive way to represent geometric objects and their transformations. This paper introduces the architecture of CliffordCoreDuo, an embedded dual-core coprocessor that offers direct hardware support to four-dimensional (4D) Clifford algebra operations. A prototype implementation on an FPGA board is detailed. Experimental results show a 1.6× average speedup of CliffordCoreDuo in comparison with the baseline mono-core architecture. A potential cycle speedup of about 40× o…
Fixed-size Quadruples for a New, Hardware-Oriented Representation of the 4D Clifford Algebra
2010
Clifford algebra (geometric algebra) offers a natural and intuitive way to model geometry in fields as robotics, machine vision and computer graphics. This paper proposes a new representation based on fixed-size elements (quadruples) of 4D Clifford algebra and demonstrates that this choice leads to an algorithmic simplification which in turn leads to a simpler and more compact hardware implementation of the algebraic operations. In order to prove the advantages of the new, quadruple-based representation over the classical representation based on homogeneous elements, a coprocessing core supporting the new fixed-size Clifford operands, namely Quad-CliffoSor (Quadruple-based Clifford coproces…
Design Space Exploration of Parallel Embedded Architectures for Native Clifford Algebra Operations
2012
In the past few decades, Geometric or Clifford algebra (CA) has received a growing attention in many research fields, such as robotics, machine vision and computer graphics, as a natural and intuitive way to model geometric objects and their transformations. At the same time, the high dimensionality of Clifford algebra and its computational complexity demand specialized hardware architectures for the direct support of Clifford data types and operators. This paper presents the design space exploration of parallel embedded architectures for native execution of four-dimensional (4D) and five-dimensional (5D) Clifford algebra operations. The design space exploration has been described along wit…
An FPGA Implementation of a Quadruple-Based Multiplier for 4D Clifford Algebra
2008
Geometric or Clifford algebra is an interesting paradigm for geometric modeling in fields as computer graphics, machine vision and robotics. In these areas the research effort is actually aimed at finding an efficient implementation of geometric algebra. The best way to exploit the symbolic computing power of geometric algebra is to support its data types and operators directly in hardware. However the natural representation of the algebra elements as variable-length objects causes some problems in the case of a hardware implementation. This paper proposes a 4D Clifford algebra in which the variable-length elements are mapped into fixed-length elements (quadruples). This choice leads to a s…
Embedded Coprocessors for Native Execution of Geometric Algebra Operations
2016
Clifford algebra or geometric algebra (GA) is a simple and intuitive way to model geometric objects and their transformations. Operating in high-dimensional vector spaces with significant computational costs, the practical use of GA requires dedicated software and/or hardware architectures to directly support Clifford data types and operators. In this paper, a family of embedded coprocessors for the native execution of GA operations is presented. The paper shows the evolution of the coprocessor family focusing on the latest two architectures that offer direct hardware support to up to five-dimensional Clifford operations. The proposed coprocessors exploit hardware-oriented representations o…
A Programmable Networked Processing Node for 3D Brain Vessels Reconstruction
2011
Real-time 3D imaging represents a developing trend in medical imaging. However, most of the 3D medical imaging algorithms are computationally intensive. In this paper, a programmable networked node for 3D brain vessels reconstruction is proposed. Starting from 2D PC-MRA (Phase-Contrast Magnetic Resonance Angiography) sequences, the node is able to generate the 3D brain vasculature using the MIP (Maximum Intensity Projection) algorithm. The node has been prototyped on the Celoxica RC203E board, equipped with a Virtex II FPGA, to get the advantages of an hardware implementation, reaching a better throughput with respect to analogous software implementations. Its generality and programmable ca…
Design and Validation of a FPGA-Based HIL Simulator for Minimum Losses Control of a PMSM
2021
This work examines the FPGA programmable logic platforms applied to minimum losses control of a Permanent Magnet Synchronous Motor (PMSM), which represents a flexible solution for the implementation of an advanced digital control algorithm, given their intrinsic parallel structure and the capability to be directly reprogrammable in the field. In particular, design and validation of a FPGA-based Hardware-In-the-Loop (HIL) simulator is proposed, by investigating about data format, quantization and discretization effects and other issues arising during the experimental validation of a controller prototype, in order to reduce the embedded software development cycle and test control systems. The…