Search results for "programma"
showing 10 items of 708 documents
Mobilas lietojumprogrammas "Easy Connect" izstrāde
2017
“Easy Connect” lietojumprogramma paredzēta uzņēmuma ikdienas sanāksmju efektīvai izpildei un pārraudzībai. Darba mērķis ir izveidot PPS, kas vislabāk atspoguļo darbinieka vajadzības un savstarpējo komunikāciju kvalitatīvai projekta vadībai. Galvenais uzdevums ir iespējami precīzāk aprakstīt lietojumprogrammas iespējas un izvērtēt vispiemērotākos risinājumus katrai no tām, lai galaprodukts nodrošinātu maksimālu apmierinātību, produktivitāti un lietošanas ērtumu, ievērojot šajā dokumentā aprakstītās metodes. Darba rezultātā tika izstrādāts dokuments, kas iekļauj funkcionālo un nefunkcionālo prasību aprakstus, datu bāzes fiziskos un konceptuālos modeļus, lietotāja saskarnes specifikācijas un c…
Projektu un klientu moduļa izstrāde personālvadības sistēmā
2019
Kvalifikācijas darbā "Projektu un klientu moduļa izstrāde personālvadības sistēmā", izstrādāti tīmekļa lietojumprogrammas "Tildes Jumis Personāls" projektu un klientu moduļi, kas personālvadības sistēmas lietotājiem ļauj sistēmā reģistrēt projektus un klientus, kā arī reģistrētos projektus sasaistīt ar sistēmā reģistrētajiem klientiem un darbiniekiem un to amatiem. Izstrādātie moduļi ir sistēmas funkcionalitātes papildinājumu pirmais etaps, un tos tālāk paredzēts izmantot, lai sistēmas lietotājiem nodrošinātu iespēju norakstīt darbinieku darba stundas pa projektiem. Moduļu izstrādē izmantotās tehnoloģijas ir Angular, Microsoft .NET Core, DevExtreme.
FPGA based digital lock-in amplifier for fNIRS systems
2018
Lock-In Amplifiers (LIA) represent a powerful technique helping to improve signals detectability when low signal to noise ratios are experienced. Continuous Wave functional Near Infrared Spectroscopy (CW-fNIRS) systems for e-health applications usually suffer of poor detection due to the presence of strong attenuations of the optical recovering path and therefore small signals are severely dipped in a high noise floor. In this work a digital LIA system, implemented on a Zynq® Field Programmable Gate Array (FPGA), has been designed and tested to verify the quality of the developed solution, when applied in fNIRS systems. Experimental results have shown the goodness of the proposed solutions.
Enabling partially reconfigurable IP cores parameterisation and integration using MARTE and IP-XACT
2012
International audience; This paper presents a framework which facilitates the parameterization and integration of IP cores into partially reconfigurable SoC platforms, departing from a high-level of abstraction. The approach is based in a Model-Driven Engineering (MDE) methodology, which exploits two widely used standards for Systems-on-Chip specification, MARTE and IP-XACT. The presented work deals with the deployment level of the MDE approach, in which the abstract components of the platform are first linked to the lower level IP-XACT counterparts. At this phase, information for parameterization and integration is readily available, and a synthesizable model can be obtained from the gener…
A fully-digital realtime SoC FPGA based phase noise analyzer with cross-correlation
2017
We report on a fully-digital and realtime operation of a phase noise analyzer using modern digital techniques with cross-correlation. With the advent of system on chip field-programmable gate arrays (SoC FPGAs) embedding hard core central processing unit, coprocessor and FPGA onto a single integrated circuit, the building of sensitive analysis devices for Time & Frequency research is made accessible at virtually no cost and benefits from reconfigurability. Used with high-speed digitizers we have successfully implemented a four-channel system whose preliminary results at 10 MHz shows a residual white noise floor < −185 dBrad2/Hz up to 5 MHz off the carrier, and flicker < −127 dBrad2/Hz using…
Run-time scalable NoC for FPGA based virtualized IPs
2017
The integration of virtualized FPGA-based hardware accelerators in a cloud computing is progressing from time to time. As the FPGA has limited resources, the dynamic partial reconfiguration capability of the FPGA is considered to share resources among different virtualized IPs during runtime. On the other hand, the NoC is a promising solution for communication among virtualized FPGA-based IPs. However, not all the virtualized regions of the FPGA will be active all the time. When there is no demand for virtualized IPs, the virtualized regions are loaded with blank bitstreams to save power. However, keeping active the idle components of the NoC connecting with the idle virtualized regions is …
Towards LST split-window algorithm FPGA implementation for CubeSats on-board computations purposes
2019
ABSTRACTNano, pico, and the so-called CubeSat satellites are taking place due to the emergent improvements in both high-performance nano and pico electronics and computational technologies. More th...
Wireless NoC for Inter-FPGA Communication: Theoretical Case for Future Datacenters
2020
Integration of FPGAs in datacenters might have different motivations from acceleration to energy efficiency, but the goal of better performance tops all. FPGAs are being utilized in a variety of ways today, tightly coupled with heterogenous computing resources, and as a standalone network of homogenous resources. Open source software stacks, propriety tool chain, and programming languages with advanced methodologies are hitting hard on the programmability wall of the FPGAs. The deployment of FPGAs in datacenters will neither be sustainable nor economical, without realizing the multi-tenancy in multiple FPGAs. Inter-FPGA communication among multiple FPGAs remained relatively less addressed p…
Combining GPU and FPGA technology for efficient exhaustive interaction analysis in GWAS
2016
Interaction between genes has become a major topic in quantitative genetics. It is believed that these interactions play a significant role in genetic variations causing complex diseases. Due to the number of tests required for an exhaustive search in genome-wide association studies (GWAS), a large amount of computational power is required. In this paper, we present a hybrid architecture consisting of tightly interconnected CPUs, GPUs and FPGAs and a fine-tuned software suite to outperform other implementations in pairwise interaction analysis while consuming less than 300Watts and fitting into a standard desktop computer case.
An Industrial Automation Course: Common Infrastructure for Physical, Virtual and Remote Laboratories for PLC Programming
2018
<span style="font-family: 'Times New Roman',serif; font-size: 10pt; mso-fareast-font-family: 'Times New Roman'; mso-ansi-language: EN-US; mso-fareast-language: DE; mso-bidi-language: AR-SA;">This work describes the development of a teaching strategy to leverage current simulation tools and promote learning of industrial automation systems. Specifically, Programmable Logic Controller (PLC) programming in an industrial automation course. We propose an infrastructure where it is possible to work with physical, virtual and mixed laboratories</span>