0000000000266328
AUTHOR
Javier Valls
Area-efficient FPGA-based FFT processor
A novel architecture for computing the fast Fourier transform on programmable devices is presented. Main results indicate that the use of one CORDIC operator to perform the multiplication by all the ‘twiddle factors’ sequentially leads to an area saving up to 35% with respect to other cores.
Efficient pipeline FFT processors for WLAN MIMO-OFDM systems
The most area-efficient pipeline FFT processors for WLAN MIMO-OFDM systems are presented. It is shown that although the R2/sup 3/SDF architecture is the most area-efficient approach for implementing pipeline FFT processors, RrMDC architectures are more efficient in MIMO-OFDM systems when more than three channels are used.
Monetary policy and exchange rate dynamics in the Spanish economy
As the Spanish economy gets more integrated in international markets, the real exchange rate becomes a key determinant of the monetary transmission. In this paper we trace out the dynamic response of prices, output and the exchange rate following a monetary policy shock. We estimate a structural VAR model whose identification scheme is based on the long run properties common to a large class of models. The results suggest that a small model with efficient asset markets plus nominal inertia and long run monetary neutrality, captures the essential features of the monetary transmission mechanism in Spain. The interest rate shock is well identified and the exchange rate overshoots its long run …