0000000000515165

AUTHOR

Sai Pranavi Avadhanam

showing 1 related works from this author

Multi-application Based Fault-Tolerant Network-on-Chip Design for Mesh Topology Using Reconfigurable Architecture

2019

In this paper, we propose a two-step fault-tolerant approach to address the faults occurred in cores. In the first stage, a Particle Swarm Optimization (PSO) based approach has been proposed for the fault-tolerant mapping of multiple applications on to the mesh based reconfigurable architecture by introducing spare cores and a heuristic has been proposed for the reconfiguration in the second stage. The proposed approach has been experimented by taking several benchmark applications into consideration. Communication cost comparisons have been carried out by taking the failed cores as user input and the experimental results show that our approach could get improvements in terms of communicati…

010302 applied physicsHeuristic (computer science)business.industryComputer scienceMesh networkingControl reconfigurationParticle swarm optimizationFault tolerance02 engineering and technology01 natural sciences020202 computer hardware & architectureNetwork on a chipSpare partEmbedded system0103 physical sciences0202 electrical engineering electronic engineering information engineeringBenchmark (computing)business
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