0000000000547656

AUTHOR

Grzegorz Bazydlo

Dual-model approach for safety-critical embedded systems

Abstract The paper presents the design of digital controllers based on two models: the Petri net model, and the UML state machine. These two approaches differ in many aspects of design flow, such as conceptual modelling, and analysis and synthesis. Each of these approaches can be used individually to design an efficient logic controller, and such solutions are well-known, but their interoperability can contribute to a much better understanding of logic controller design and validation. This is especially important in the case of safety- or life-critical embedded systems, and apart from this, a dual-model controller design can make up redundant system increasing its reliability.

research product

From UML State Machine Diagram into FPGA Implementation

Abstract In the paper a method of using the Unified Modeling Language diagrams for specification of digital systems, especially logic controllers, is presented. The proposed method is based mainly on the UML state machine diagrams and uses Hierarchical Concurrent Finite State Machines (HCFSMs) as a temporary model. The paper shows a way to transform the UML diagrams to the form that is acceptable by reconfigurable FPGAs (Field Programmable Gate Arrays). The UML specification is used to generate an effective program in Hardware Description Languages (HDLs), especially Verilog.

research product

From UML Specification into FPGA Implementation

In the paper a method of using the Unified Modeling Language for specification of digital systems, especially logic controllers, is presented. The proposed method is based mainly on the UML state machine di- agrams and uses Hierarchical Concurrent Finite State Machines (HCFSMs) as a temporary model. The paper shows a way to transform the UML diagrams, expressed in XML language, to the form that is acceptable by reconfigurable FPGAs (Field Programmable Gate Ar- rays). The UML specification is used to generate an eective program in Hardware Description Languages (HDLs), especially Verilog.

research product