0000000000704309

AUTHOR

Ciprian Radu

showing 3 related works from this author

Domain-Knowledge Optimized Simulated Annealing for Network-on-Chip Application Mapping

2013

Network-on-Chip architectures are scalable on-chip interconnection networks. They replace the inefficient shared buses and are suitable for multicore and manycore systems. This paper presents an Optimized Simulated Annealing (OSA) algorithm for the Network-on-Chip application mapping problem. With OSA, the cores are implicitly and dynamically clustered using knowledge about communication demands. We show that OSA is a more feasible Simulated Annealing approach to NoC application mapping by comparing it with a general Simulated Annealing algorithm and a Branch and Bound algorithm, too. Using real applications we show that OSA is significantly faster than a general Simulated Annealing, withou…

Computer Science::Hardware ArchitectureInterconnectionMulti-core processorNetwork on a chipBranch and boundComputer scienceScalabilitySimulated annealingComputer Science::Networking and Internet ArchitectureParallel computingAdaptive simulated annealingCluster analysis
researchProduct

A stigmergic approach for social interaction design in collaboration engineering

2014

The increasing number of available collaborative tools and their extensive use in many organizational activities has constantly raised the complexity of collaboration engineering. It presumes the design of group decision processes, supported by a wide-range of groupware tools, in an ill-structured, dynamic, and open environment. As many of these processes are recurring by nature, the development of a shared repository to store the collective knowledge and experiences of group decision process designs became a core research topic of collaboration engineering in last few years. The paper presents a human-computer interaction engineering approach to design a software prototype that provides pe…

Structure (mathematical logic)Collaborative softwareKnowledge managementbusiness.industryDesign space explorationComputer scienceCognitive NeuroscienceCollective intelligenceSocial relationComputer Science ApplicationsSoftwareArtificial IntelligenceSet (psychology)businessNeurocomputing
researchProduct

Developing Domain-Knowledge Evolutionary Algorithms for Network-on-Chip Application Mapping

2013

This paper addresses the Network-on-Chip (NoC) application mapping problem. This is an NP-hard problem that deals with the optimal topological placement of Intellectual Property cores onto the NoC tiles. Network-on-Chip application mapping Evolutionary Algorithms are developed, evaluated and optimized for minimizing the NoC communication energy. Two crossover and one mutation operators are proposed. It is analyzed how each optimization algorithm performs with every genetic operator, in terms of solution quality and convergence speed. Our proposed operators are compared with state-of-the-art genetic operators for permutation problems. Finally, the problem is approached in a multi-objective w…

Mathematical optimizationMutation operatorTheoretical computer scienceComputer Networks and CommunicationsComputer scienceQuality control and genetic algorithmsCrossoverEvolutionary algorithmGenetic operatorMulti-objective optimizationNetwork on a chipArtificial IntelligenceHardware and ArchitectureSimulated annealingGenetic algorithmGenetic representationSoftwareMicroprocessors and Microsystems
researchProduct