0000000000728669
AUTHOR
Vincent Brost
Modular VLIW processor based on FPGA for real-time image processing
National audience
Fuzzy selecting local region level set algorithm
In this work, we introduced a novel localized region based level set model which is simultaneously effective for heterogeneous object or/and background and robust against noise. As such, we propose to minimize an energy functional based on a selective local average, i.e., when computing the local average, instead to use the intensity of all the pixels surrounding a given pixel, we first give a local Gaussian fuzzy membership to be a background or an object pixel to each of these surrounding pixels and then, we use the fuzzy weighted local average of these pixels to replace the traditional local average. With the graphics processing units' acceleration, the local lattice Boltzmann method is …
LDR Image to HDR Image Mapping with Overexposure Preprocessing
International audience; Due to the growing popularity of High Dynamic Range (HDR) images and HDR displays, a large amount of existing Low Dynamic Range (LDR) images are required to be converted to HDR format to benefit HDR advantages, which give rise to some LDR to HDR algorithms. Most of these algorithms especially tackle overexposed areas during expanding, which is the potential to make the image quality worse than that before processing and introduces artifacts. To dispel these problems, we . present a new,LDR to HDR approach, unlike the existing techniques, it focuses on avoiding sophisticated treatment to overexposed areas in dynamic range expansion step. Based on a separating principl…
Image boundaries detection: from thresholding to implicit curve evolution
The development of high dimensional large-scale imaging devices increases the need of fast, robust and accurate image segmentation methods. Due to its intrinsic advantages such as the ability to extract complex boundaries, while handling topological changes automatically, the level set method (LSM) has been widely used in boundaries detection. Nevertheless, their computational complexity limits their use for real time systems. Furthermore, most of the LSMs share the limit of leading very often to a local minimum, while the effectiveness of many computer vision applications depends on the whole image boundaries. In this paper, using the image thresholding and the implicit curve evolution fra…
A LDR image expansion method for displaying on HDR screen
International audience
Palmprint and face score level fusion: hardware implementation of a contactless small sample biometric system
Including multiple sources of information in personal identity recognition and verification gives the opportunity to greatly improve performance. We propose a contactless biometric system that combines two modalities: palmprint and face. Hardware implementations are proposed on the Texas Instrument Digital Signal Processor and Xilinx Field-Programmable Gate Array (FPGA) platforms. The algorithmic chain consists of a preprocessing (which includes palm extraction from hand images), Gabor feature extraction, comparison by Hamming distance, and score fusion. Fusion possibilities are discussed and tested first using a bimodal database of 130 subjects that we designed (uB database), and then two …
Flexible VLIW processor based on FPGA for real-time image processing
International audience
VLIW architecture compilation-simulation and its implementation into FPGA
International audience; Embedded systems present a tremendous opportunity to customize designs by exploiting the application behavior. Shrinking time-to-market, coupled with short product lifetimes, create a critical need for rapid exploration and evaluation of candidate architectures achievement of these constraint. In the recent years, these systems have grown to the new concepts with inner computing processing for improving the performance that will be known as embedded computing system. Embedded computing with VLIW (Very Long Instruction Word) based architecture has been alternative choice to implement the target application into electronics devices in many areas such as digital image p…
Inverse Tone Mapping Based upon Retina Response
International audience; The development of high dynamic range (HDR) display arouses the research of inverse tone mapping methods, which expand dynamic range of the low dynamic range (LDR) image to match that of HDR monitor. This paper proposed a novel physiological approach, which could avoid artifacts occurred in most existing algorithms. Inspired by the property of the human visual system (HVS), this dynamic range expansion scheme performs with a low computational complexity and a limited number of parameters and obtains high-quality HDR results. Comparisons with three recent algorithms in the literature also show that the proposed method reveals more important image details and produces …
Concept and Development of Modular VLIW Processor Based on FPGA
Modern FPGA chips, with their larger memory capacity and reconfigurability potential, are opening new frontiers in rapid prototyping of embedded systems. With the advent of high density FPGAs it is now possible to implement a high performance VLIW processor core in an FPGA. Architecture based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance level in embedded system. In VLIW architecture, the effectiveness of these processors depends on the ability of compilers to provide sufficient instruction level parallelism(ILP) in program code. Using advanced compiler technology could take these functions, This paper describes research resu…
An inverse tone mapping method for displaying images on HDR monitor
International audience
A predictive function optimization algorithm for multi-spectral skin lesion assessment
The newly introduced Kubelka-Munk Genetic Algorithm (KMGA) is a promising technique used in the assessment of skin lesions. Unfortunately, this method is computationally expensive due to its function inverting process. In the work of this paper, we design a Predictive Function Optimization Algorithm in order to improve the efficiency of KMGA by speeding up its convergence rate. Using this approach, a High-Convergence-Rate KMGA (HCR-KMGA) is implemented onto multi-core processors and FPGA devices respectively. Furthermore, the implementations are optimized using parallel computing techniques. Intensive experiments demonstrate that HCR-KMGA can effectively accelerate KMGA method, while improv…
Multiple modular very long instruction word processors based on field programmable gate arrays
Modern field programmable gate array (FPGA) chips, with their large memory capacity and reconfigurability potential, are opening new frontiers in rapid prototyping of embedded systems. With the advent of high-density FPGAs, it is now possible to implement a high-performance very long instruction word (VLIW) processor core in an FPGA. This paper describes research results about enabling the DSP TMS320 C6201 model for real-time image processing applications by exploiting FPGA technology. We present a modular DSP C6201 VHDL model with a variable instruction set. We call this new development a minimum mandatory modules (M3) approach. Our goals are to keep the flexibility of DSP in order to shor…
Multi-Kernel Implicit Curve Evolution for Selected Texture Regions Segmentation in VHR Satellite Images
Very high resolution (VHR) satellite images provide a mass of detailed information which can be used for urban planning, mapping, security issues, or environmental monitoring. Nevertheless, the processing of this kind of image is timeconsuming, and extracting the needed information from among the huge quantity of data is a real challenge. For some applications such as natural disaster prevention and monitoring (typhoon, flood, bushfire, etc.), the use of fast and effective processing methods is demanded. Furthermore, such methods should be selective in order to extract only the information required to allow an efficient interpretation. For this purpose, we propose a texture region segmentat…
Multiple Modular VLIW Processors based on FPGA
International audience
Design Space Exploration for a Custom VLIW Architecture: Direct Photo Printer Hardware Setting Using VEX Compiler
Increasingly more computing power is demanded for contemporary applications such as multimedia, 3D visualization, and telecommunication. This paper presents a design space exploration (DSE) experience for an embedded VLIW processor that allows finding out the best architecture for given application. The proposed method has been implemented and tested using an image processing chain for direct photo printer. Our results show a considerable improvement in hardware cost and performance. After the best architecture is identified, we applied a technique to optimize the code in VEX system that uses ?inlining? function in order to reduce execution time.
An improved spatial feature-based detection algorithm for vertical scratches in old film
International audience
Flexible VLIW processor based on FPGA for real-time image processing
Modern FPGA chips, with their larger memory capacity and reconfigurability potential, are opening new frontiers in rapid prototyping of embedded systems. With the advent of high density FPGAs it is now possible to implement a high performance Very Long Instruction Word (VLIW) processor core in an FPGA. With VLIW architecture, the processor effectiveness depends on the ability of compilers to provide sufficient Instruction Level Parallelism (ILP) from program code. This paper describes research result about enabling the VLIW processor model for real-time processing applications by exploiting FPGA technology. Our goals are to keep the flexibility of processors in order to shorten the developm…
Implémentations matérielles d'un système biométrique bimodal
National audience
Kinematic analysis of motor strategies in frail aged adults during the Timed Up and Go: how to spot the motor frailty?
Asma Hassani,1 Alexandre Kubicki,2,3 Vincent Brost,1 France Mourey,2,4 Fan Yang1 1Laboratoire LE2I CNRS 6306, Université de Bourgogne, Dijon, France; 2Institut National de la Santé et de la Recherche Médicale (INSERM), Cognition Action et Plasticité Sensori-Motrice, Campus Universitaire, Université de Bourgogne, Dijon, France; 3Centre Hospitalier Universitaire de Dijon, Hôpital de Champmaillot, Dijon, France; 4Faculté de Médecine, Université de Bourgogne, Dijon, France Objective: The purpose of this work was to analyze and compare the movement kinematics of sit-to-stand (STS) and back-to-sit (B…
Architecture-Driven Level Set Optimization: From Clustering to Sub-pixel Image Segmentation
Thanks to their effectiveness, active contour models (ACMs) are of great interest for computer vision scientists. The level set methods (LSMs) refer to the class of geometric active contours. Comparing with the other ACMs, in addition to subpixel accuracy, it has the intrinsic ability to automatically handle topological changes. Nevertheless, the LSMs are computationally expensive. A solution for their time consumption problem can be hardware acceleration using some massively parallel devices such as graphics processing units (GPUs). But the question is: which accuracy can we reach while still maintaining an adequate algorithm to massively parallel architecture? In this paper, we attempt to…
Vertical scratches detection based on edge detection for old film
Automatic detection of image damaged regions is the key to automatic video image inpainting. Vertical scratches are the common damages in the old film. In this paper, a vertical scratches detection algorithm based on edge detection is proposed. The proposed algorithm first uses the operator which has the largest response to the vertical edge in Sobel operator to detect edges, and then uses canny operator to detect edges further. Third, we detect vertical lines in the image through probabilistic Hough transform. Finally, we obtain the true locations of the vertical lines scratches through morphology and width constraints. Many experiments show that our method can detect vertical line scratch…
Implementation of pattern recognition algorithm based on RBF neural network
In this paper, we present implementations of a pattern recognition algorithm which uses a RBF (Radial Basis Function) neural network. Our aim is to elaborate a quite efficient system which realizes real time faces tracking and identity verification in natural video sequences. Hardware implementations have been realized on an embedded system developed by our laboratory. This system is based on a DSP (Digital Signal Processor) TMS320C6x. The optimization of implementations allow us to obtain a processing speed of 4.8 images (240x320 pixels) per second with a correct rate of 95% of faces tracking and identity verification.