0000000000821443
AUTHOR
T Childers
Hardware and firmware developments for the upgrade of the ATLAS Level-1 Central Trigger Processor
The Central Trigger Processor (CTP) is the final stage of the ATLAS first level trigger system which reduces the collision rate of 40 MHz to a Level-1 event rate of 100 kHz. An upgrade of the CTP is currently underway to significantly increase the number of trigger inputs and trigger combinations, allowing additional flexibility for the trigger menu. We present the hardware and FPGA firmware of the newly designed core module (CTPCORE+) module of the CTP, as well as results from a system used for early firmware and software prototyping based on commercial FPGA evaluation boards. First test result from the CTPCORE+ module will also be shown.
An upgraded ATLAS Central Trigger for post-2014 LHC luminosities
In early 2012, the Large Hadron Collider (LHC) reached instantaneous luminosities of 6.7·1033 cm−2s−1 and produced events with up to 40 interactions per colliding proton bunch. This places stringent operational and physical requirements on the ATLAS trigger in order to reduce the collision rate of up to 40 MHz when operating with design parameters to a manageable event storage rate of about 400 Hz without discarding those events considered interesting. The Level-1 trigger is the first rate-reducing step in the ATLAS trigger and primarily composed of the Calorimeter Trigger, Muon Trigger, and the Central Trigger Processor which are implemented in custom built VME electronics. The Central Tri…