A DC and small signal AC model for organic thin film transistors including contact effects and non quasi static regime

6533b829fe1ef96bd128a61a

RESEARCH PRODUCT

A DC and small signal AC model for organic thin film transistors including contact effects and non quasi static regime

Matteo Rapisarda Guglielmo Fortunato Luigi Mariucci Mattia Frasca A. Ciccazzo Giovanni Maira Antonio Valletta Sabrina Calvi

subject

DC model Materials science Contact effects parasitic capacitance Schottky barrier Organic thin film transistors 02 engineering and technology Hybrid-pi model 01 natural sciences Signal Non-quasi static small signal model Biomaterials Organic thin film transistors; DC model; AC model; Contact effects; parasitic capacitance; Non-quasi static small signal model Parasitic capacitance Transmission line 0103 physical sciences Hardware_INTEGRATEDCIRCUITS Materials Chemistry AC model Electrical and Electronic Engineering Electrical impedance 010302 applied physics business.industry General Chemistry 021001 nanoscience & nanotechnology Condensed Matter Physics Electronic Optical and Magnetic Materials Organic semiconductor Thin-film transistor Optoelectronics 0210 nano-technology business

description

Abstract We present a compact model for the DC and small signal AC analysis of Organic Thin Film Transistors (OTFTs). The DC part of the model assumes that the electrical current injected in the OTFT is limited by the presence of a metal/organic semiconductor junction that, at source, acts as a reverse biased Schottky junction. By including this junction, modeled as a reverse biased gated diode at source, the DC model is able to reproduce the scaling of the electrical characteristics even for short channel devices. The small signal AC part of the model uses a transmission line approach in order to compute the impedances of the channel and parasitic regions of the device. The overlap capacitances and the presence of non-ideal metal/organic semiconductor junctions are taken in account as well and the model can be easily adapted to different device geometries. The model is particularly well suited for printed devices, often realized with large process tolerances, since it takes into consideration the presence of parasitic regions and their effect on the AC operation. The model has been validated on printed OTFTs using a pentace-derivative as organic semiconductor with a quite peculiar device layout. It has been fully implemented in Verilog-A programming language.

year	journal	country	edition	language
2017-02-01	Organic Electronics

https://doi.org/10.1016/j.orgel.2016.11.027