6533b83afe1ef96bd12a79b4
RESEARCH PRODUCT
Exploring FPGA‐Based Lock‐In Techniques for Brain Monitoring Applications
Giuseppe Costantino GiaconiaGiuseppe GrecoRaimondo RizzoLeonardo Mistrettasubject
Engineeringhardware description language (HDL) near‐infrared spectroscopy (NIRS)light emitting diode (LED)Computer Networks and Communicationslcsh:TK7800-836002 engineering and technologysilicon photomultiplier (SiPM)Settore ING-INF/01 - Elettronica01 natural sciencesSignaldigital lock‐in amplifier (DLIA)law.invention hardware description language (HDL)microprocessorslawVHDL0202 electrical engineering electronic engineering information engineeringElectronic engineeringDetection theoryElectrical and Electronic EngineeringField-programmable gate arraycomputer.programming_languagebusiness.industryNoise (signal processing)lcsh:Electronics010401 analytical chemistryEmphasis (telecommunications)near‐infrared spectroscopy (NIRS)020206 networking & telecommunications0104 chemical sciences light emitting diode (LED) microprocessorsfield programmable gate array (FPGA)Microprocessordigital lock‐in amplifier (DLIA)Hardware and ArchitectureControl and Systems EngineeringSignal Processingbusinessdigital lock‐in amplifier (DLIA); field programmable gate array (FPGA); near‐infrared spectroscopy (NIRS); hardware description language (HDL); light emitting diode (LED); silicon photomultiplier (SiPM); microprocessors field programmable gate array (FPGA) silicon photomultiplier (SiPM)Digital filtercomputerComputer hardwaredescription
Functional near‐infrared spectroscopy (fNIRS) systems for e‐health applications usually suffer from poor signal detection, mainly due to a low end‐to‐end signal‐to‐noise ratio of the electronics chain. Lock‐in amplifiers (LIA) historically represent a powerful technique helping to improve performance in such circumstances. In this work a digital LIA system, based on a Zynq® field programmable gate array (FPGA) has been designed and implemented, in an attempt to explore if this technique might improve fNIRS system performance. More broadly, FPGA‐based solution flexibility has been investigated, with particular emphasis applied to digital filter parameters, needed in the digital LIA, and its impact on the final signal detection and noise rejection capability has been evaluated. The realized architecture was a mixed solution between VHDL hardware modules and software modules, running within a microprocessor. Experimental results have shown the goodness of the proposed solutions and comparative details among different implementations will be detailed. Finally a key aspect taken into account throughout the design was its modularity, allowing an easy increase of the input channels while avoiding the growth of the design cost of the electronics system.
year | journal | country | edition | language |
---|---|---|---|---|
2017-03-02 | Electronics |