Search results for " CIRCUIT"
showing 10 items of 634 documents
Nonfullerene Polymer Solar Cells Reaching a 9.29% Efficiency Using a BODIPY-Thiophene Backboned Donor Material
2018
A conjugated polymer donor containing BODIPY-thiophene dyads in the backbone, P(BdP-EHT), combined with a low bandgap nonfullerene acceptor (SMDPP) consisting of carbazole and diketopyrrolopyrrole units linked with a tetracyanobutadiene acceptor π-linker, was used to design bulk heterojunction polymer solar cells. After the optimization of the donor to acceptor weight ratio and solvent vapor annealing of the P(BdP-EHT):SMDPP active layer, the resulting polymer solar cell showed an overall power conversion efficiency of 9.29%, which is significantly higher than that for the polymer solar cell based on PC71BM (7.41%) processed under identical conditions. This improved power conversion efficie…
DC link voltage swinging and load current unbalance in fault tolerant VSI. overview and compensation strategies
2015
The topic of this paper is the discussion on the performance of a three-phase fault tolerant inverter with particular attention to the underrated aspect of current unbalances occurring due to the DC link voltage fluctuates after the inverter reconfiguration. Capacitor voltage unbalance affects not only the average output voltage of the inverter, but also its performance. In fact, the inverter performance depends on the fluctuating DC-link voltage components rather than on the average DC-link voltage. After a brief analysis of the voltage fluctuation phenomena resulting from fault tolerant configuration and their effect on load current unbalance, the Authors consider different compensating p…
Fast SWAP gate by adiabatic passage
2005
We present a process for the construction of a SWAP gate which does not require a composition of elementary gates from a universal set. We propose to employ direct techniques adapted to the preparation of this specific gate. The mechanism, based on adiabatic passage, constitutes a decoherence-free method in the sense that spontaneous emission and cavity damping are avoided.
On the effects of the Double-Walled Tubes lay-out on the DEMO WCLL breeding blanket module thermal behavior
2019
Abstract The EU-DEMO Water-Cooled Lithium Lead Breeding Blanket (WCLL BB) concept foresees liquid Pb-15.7Li eutectic alloy as breeder and neutron multiplier, whereas pressurized subcooled water as coolant, with operative conditions typical of the PWR fission reactors (temperature in the range of 295–328 °C and pressure of 15.5 MPa). The cooling down of the BB is guaranteed by means of two separated cooling circuits: the one consisted in square channels housed within the complex of Side Walls and First Wall, and the one composed of a set of Double-Walled Tubes (DWTs) submerged in the Breeding Zone (BZ) and deputed to remove heat power therein generated. A parametric thermal study has been ca…
Frequency mapping in dynamic light emission with wavelet transform
2013
International audience; Dynamic photon emission microscopy is an e cient tool to analyse today's integrated circuit. Nevertheless, the reduction of transistor's dimensions leads to more complex acquisitions where many spots can be seen. A frequency characterization of the whole acquired area can help to have a better understanding of it. With that purpose in mind, a new methodology to draw frequency mapping of dynamic light emission acquisition is reported. It is fully automated and based on wavelet transform and autocorrelation function. Regarding the possible use in an industrial context, the suggested method can help to localize abnormal emission activity and it gives some perspectives o…
Flexible Spare Core Placement in Torus Topology based NoCs and its validation on an FPGA
2021
In the nano-scale era, Network-on-Chip (NoC) interconnection paradigm has gained importance to abide by the communication challenges in Chip Multi-Processors (CMPs). With increased integration density on CMPs, NoC components namely cores, routers, and links are susceptible to failures. Therefore, to improve system reliability, there is a need for efficient fault-tolerant techniques that mitigate permanent faults in NoC based CMPs. There exists several fault-tolerant techniques that address the permanent faults in application cores while placing the spare cores onto NoC topologies. However, these techniques are limited to Mesh topology based NoCs. There are few approaches that have realized …
A laser-based system for a fast and accurate measurement of gain and linearity of photomultipliers
2018
This paper describes a method for the measurement of gain and linearity of photomultipliers (PMTs). Gain and linearity are two fundamental parameters to use properly a PMT in several physics experiments. In the developed system light is laser generated and adressed to the PMT through a set of optical fibers. The data acquisition system consists in a commercial 16 channel digitizer coupled to a custom front-end board. With the chosen digitizer the system is scalable to test up to 16 PMTs, with the aid of a light distribution system and a multi-channel version of the front-end board. Data analysis is performed by a custom acquisition software. A 1.5» Hamamatsu PMT is used to validate the syst…
Surface plasmon propagation in metal nanowires
2012
Plasmonic circuitry is considered as a promising solution-effectivetechnology for miniaturizing and integrating the next generation ofoptical nano-devices. The realization of a practical plasmonic circuitry strongly depends on the complete understanding of the propagation properties of two key elements: surface plasmons and electrons. The critical part constituting the plasmonic circuitry is a waveguide which can sustain the two information-carriers simultaneously. Therefore, we present in this thesis the investigations on the propagation of surface plasmons and the co-propagation of surface plasmons and electrons in single crystalline metal nanowires. This thesis is therefore divided into …
Well-posed nonlinear problems in integrated circuits modeling
1991
In this paper we study the problem (E) + (BC) + (IC) (see below) which represents a model for integrated circuits. We assume that the distributed parametersr(x) andc(x) are nonconstant, dielectric leakages depend on thex-coordinate as well as the voltage level, while the interconnecting multiport is nonlinear and possibly multivalued.
Nonlinear Analysis of Phase-locked Loop-Based Circuits
2013
Main problems of simulation and mathematical modeling of high-frequency signals for analog Costas loop and for analog phase-locked loop (PLL) are considered. Two approachers which allow to solve these problems are considered. In the first approach, nonlinear models of classical PLL and classical Costas loop are considered. In the second approach, engineering solutions for this problems are described. Nonlinear differential equations are derived for both approaches.