Search results for " computing"

showing 10 items of 2075 documents

Design of a Generic 3-D Scene Generator for Passive Optical Missions and Its Implementation for the ESA’s FLEX/Sentinel-3 Tandem Mission

2018

During the design phase of a satellite mission, end-to-end mission performance simulator (E2ES) tools allow scientists and engineers evaluating the mission concept, consolidating system technical requirements and analyzing the suitability of the implemented technical solutions and data processing algorithms. The generation of synthetic scenes is one of the core parts of an E2ES, providing scenes (ground truth) as would be observed by satellite instruments and used as reference against simulated retrieved mission products. An appropriate generation of the scene also allows assessing the performance of the ground data processing chain replacing real instrument data before the mission is in or…

Ground truthRadiometer010504 meteorology & atmospheric sciencesSpectrometerComputer scienceReal-time computingComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION0211 other engineering and technologies02 engineering and technology01 natural sciencesRadianceGeneral Earth and Planetary SciencesFLEXElectrical and Electronic EngineeringComputingMethodologies_COMPUTERGRAPHICS021101 geological & geomatics engineering0105 earth and related environmental sciencesIEEE Transactions on Geoscience and Remote Sensing
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Datorzinātne un informācijas tehnoloģijas

2011

Grover’s algorithmHigher order transformationsOntologyBusiness process controlSoftware development:TECHNOLOGY::Information technology::Computer science [Research Subject Categories]Quantum computingModel-driven developmentTool definition metamodelData browsingTransformation-driven architectureGraphical tool buildingCubic spline interpolationGUILanguages for model-driven developmentRelational databases
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A novel hardware accelerator for the HEVC intra prediction

2015

International audience; A novel hardware accelerator for the High Efficiency Video Coding (HEVC) intra prediction is presented in this paper in order to reduce the computation complexity within this standard and to accelerate the concerned calculations. We propose a new pipelined structure that we called Processing Element (PE) to execute all angular modes, and we repeat it in five paths that our architecture composed of. We present also another structure to carry out the Planar mode. This architecture supports all intra prediction modes for all prediction unit sizes. The synthesis results show that our design can run at 213 MHz for Xilinx Virtex 6 and is capable to process real time 120 10…

HEVC0209 industrial biotechnologyAdderVirtexComputer scienceProcessing element020208 electrical & electronic engineering1080pFPGAs02 engineering and technologyParallel computingIntra prediction[SPI]Engineering Sciences [physics]020901 industrial engineering & automationPlanar0202 electrical engineering electronic engineering information engineering[ SPI ] Engineering Sciences [physics]Hardware accelerationField-programmable gate arrayCoding (social sciences)
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Fully pipelined real time hardware solution for High Efficiency Video Coding (HEVC) intra prediction

2016

International audience; A fully pipelined hardware accelerator for the High Efficiency Video Coding (HEVC) intra prediction is presented in this paper in order to reduce the computation complexity coming with this module and to accelerate the concerned calculations. Two reconfigurable structures are developed in this paper, the first one concerns angular modes and is identified as Processing Element for Angular (PEA) modes, the other is made in order to handle with the Planar mode and is identified as Processing Element for the Planar (PEP) mode. Each structure is repeated in five paths, that our architecture composed of, working in parallel way. This architecture supports all intra predict…

HEVC[ INFO ] Computer Science [cs]Image compressionComputer scienceReal-time processing1080pFPGAs02 engineering and technologyIntra prediction0202 electrical engineering electronic engineering information engineering[INFO]Computer Science [cs]Field-programmable gate arrayVirtexbusiness.industryReconfigurable computing020206 networking & telecommunicationsFrame rateReconfigurable computingHardware and ArchitectureHardware acceleration020201 artificial intelligence & image processingbusinessSoftwareComputer hardwareImage compressionCoding (social sciences)
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A HARDWARE SOLUTION FOR HEVC INTRA PREDICTION LOSSLESS CODING

2015

International audience; The lossless coding mode of the High Efficiency Video Coding (HEVC) main profile that bypasses transform, quantization, and in-loop filters is described. Compared to the HEVC non-lossless coding mode, the HEVC lossless coding mode provides perfect fidelity and an average bit-rate reduction of 3.2%–13.2%. It also significantly outperforms the existing lossless compression solutions, such as JPEG2000 and JPEG-LS for images as well as WinRAR for data archiving. A fully parallel-based solution is presented in this paper in order to reduce processing time and computation complexity resulting from intra prediction. Two higher performance structures are designed to perform …

HEVC[INFO.INFO-TI] Computer Science [cs]/Image Processing [eess.IV][ INFO.INFO-IM ] Computer Science [cs]/Medical Imaginglossless coding[INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV][ INFO.INFO-TI ] Computer Science [cs]/Image Processing[INFO.INFO-IM] Computer Science [cs]/Medical Imaging[INFO.INFO-IM]Computer Science [cs]/Medical Imagingparallel computing 1intra predictionFPGA
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Joint User Association and Dynamic Beam Operation for High Latitude Muti-beam LEO Satellites

2021

In Low Earth Orbit (LEO) satellites, which run in polar orbit, the area of overlap among beams becomes wider as the latitude of satellites increases, which leads to intolerable interference and extra energy consumption. To minimize the onboard power with QoS requirements, we propose an energy optimization model with considering power allocation, user association and dynamic beam ON/OFF operation jointly. Moreover, the frequent beam ON/OFF operations lead to the large number of user handovers, so handover cost is also considered in the model. The original problem is decomposed into two levels due to the high coupling of variables and the successive convex approximation is employed. A low com…

HandoverComputer scienceReal-time computingPolar orbitTopology (electrical circuits)Energy consumptionEnergy minimizationInterference (wave propagation)Beam (structure)Power (physics)2021 26th IEEE Asia-Pacific Conference on Communications (APCC)
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A fog-assisted system to defend against Sybils in vehicular crowdsourcing

2022

Technological advancements in vehicular transportation systems have led to the growth of novel paradigms, in which vehicles and infrastructures collaborate to infer high-level knowledge about phenomena of interest. Vehicular Social Network (VSN) is one such paradigm in which vehicular network entities are considered as part of an Online Social Network (OSN), paving the way for new services derived from social context. Although vehicular crowdsourcing has tremendous benefits, its deployment in real systems requires to solve important challenges including defense against Sybil attacks. This paper proposes a novel fog-assisted system that uses SybilDriver to minimize the presence of Sybil enti…

Hardware and ArchitectureComputer Networks and CommunicationsSybil detectionCrowdsourcingFog computingTruthfulnessSoftwareComputer Science ApplicationsInformation SystemsVehicular Social Network
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Multi-objective optimisations for a superscalar architecture with selective value prediction

2012

This work extends an earlier manual design space ex ploration of our developed Selective Load Value Pre diction based superscalar architecture to the L2 unified cache. A fter that we perform an automatic design space expl oration using a special developed software tool by varying several architectural parameters. Our goal is to find optim al configurations in terms of CPI (Cycles per Instruction) and energy consumption. By varying 19 architectural parameter s, as we proposed, the design space is over 2.5 millions of billions configurations which obviously means that only heuristic search can be considered. Therefore, we propose dif ferent methods of automatic design space exploratio n based…

Hardware and ArchitectureComputer scienceCycles per instructionSuperscalarValue (computer science)Parallel computingCacheEnergy consumptionElectrical and Electronic EngineeringDesign spaceSoftwareSpace explorationSign (mathematics)IET Computers & Digital Techniques
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SYSTOLIC GENERATION OF k-ARY TREES

1999

The only parallel generating algorithms for k-ary trees are those of Akl and Stojmenović in 1996 and of Vajnovszki and Phillips in 1997. In the first of them, trees are represented by an inversion table and the processor model is a linear aray multicomputer. In the second, trees are represented by bitstrings and the algorithm executes on a shared memory multiprocessor. In this paper we give a parallel generating algorithm for k-ary trees represented by generalized P–sequences for execution on a linear array multicomputer.

Hardware and ArchitectureShared memory multiprocessorProcessor modelWeight-balanced treeParallel algorithmParallel computingInversion tableSoftwareTheoretical Computer ScienceLinear arrayMathematicsVector processorParallel Processing Letters
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AMCAS: Advanced Methods for the Co-Design of Complex Adaptive Systems

2006

Abstract This work proposes a new approximation to design and program Complex Adaptive Systems (CAS), these systems comprise neural network, intelligent agents, genetic algorithms, support vector machines and artificial intelligence systems in general. Due to the complexity of such systems, it is necessary to build a design environment able to ease the design work, allowing reusability and easy migration to hardware and/or software. Ptolemy II is used as the base system to simulate and evaluate the designs with different Models of Computation so that an optimum decision about the hardware or software implementation platform can be taken.

Hardware architectureSystem of systemsComputer sciencebusiness.industryModel of computationDistributed computingcomputer.software_genreIntelligent agentSoftwareComputer engineeringSystems development life cycleSystems designHardware compatibility listbusinesscomputerReusability
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