Search results for "ARCHITECTURE"

showing 10 items of 3706 documents

Finding near-perfect parameters for hardware and code optimizations with automatic multi-objective design space explorations

2012

Summary In the design process of computer systems or processor architectures, typically many different parameters are exposed to configure, tune, and optimize every component of a system. For evaluations and before production, it is desirable to know the best setting for all parameters. Processing speed is no longer the only objective that needs to be optimized; power consumption, area, and so on have become very important. Thus, the best configurations have to be found in respect to multiple objectives. In this article, we use a multi-objective design space exploration tool called Framework for Automatic Design Space Exploration (FADSE) to automatically find near-optimal configurations in …

SpeedupComputer Networks and CommunicationsDesign space explorationComputer sciencebusiness.industryParallel computingProgram optimizationMulti-objective optimizationComputer Science ApplicationsTheoretical Computer ScienceMicroarchitectureComputational Theory and MathematicsScalabilityCode (cryptography)Engineering design processbusinessSoftwareComputer hardwareConcurrency and Computation: Practice and Experience
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Automatic multi-objective optimization of parameters for hardware and code optimizations

2011

Recent computer architectures can be configured in lots of different ways. To explore this huge design space, system simulators are typically used. As performance is no longer the only decisive factor but also e.g. power usage or the resource usage of the system it became very hard for designers to select optimal configurations. In this article we use a multi-objective design space exploration tool called FADSE to explore the vast design space of the Grid Alu Processor (GAP) and its post-link optimizer called GAPtimize. We improved FADSE with techniques to make it more robust against failures and to speed up evaluations through parallel processing. For the GAP, we present an approximation o…

SpeedupParallel processing (DSP implementation)Computer architectureComputer engineeringComputer scienceDesign space explorationPareto principleProgram optimizationGridMulti-objective optimizationSpace exploration
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Reconfigurable Accelerator for the Word-Matching Stage of BLASTN

2013

BLAST is one of the most popular sequence analysis tools used by molecular biologists. It is designed to efficiently find similar regions between two sequences that have biological significance. However, because the size of genomic databases is growing rapidly, the computation time of BLAST, when performing a complete genomic database search, is continuously increasing. Thus, there is a clear need to accelerate this process. In this paper, we present a new approach for genomic sequence database scanning utilizing reconfigurable field programmable gate array (FPGA)-based hardware. In order to derive an efficient structure for BLASTN, we propose a reconfigurable architecture to accelerate the…

SpeedupSequence databaseHardware and ArchitectureComputer scienceSequence analysisGenomicsParallel computingElectrical and Electronic EngineeringData structureGenomic databasesSoftwareReconfigurable computingWord (computer architecture)IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Alignment-Free Sequence Comparison over Hadoop for Computational Biology

2015

Sequence comparison i.e., The assessment of how similar two biological sequences are to each other, is a fundamental and routine task in Computational Biology and Bioinformatics. Classically, alignment methods are the de facto standard for such an assessment. In fact, considerable research efforts for the development of efficient algorithms, both on classic and parallel architectures, has been carried out in the past 50 years. Due to the growing amount of sequence data being produced, a new class of methods has emerged: Alignment-free methods. Research in this ares has become very intense in the past few years, stimulated by the advent of Next Generation Sequencing technologies, since those…

SpeedupTheoretical computer scienceSettore INF/01 - InformaticaComputer scienceAlignment-free sequence comparison and analysis; Distributed computing; Hadoop; MapReduce; Software; Mathematics (all); Hardware and ArchitectureSequence alignmentContext (language use)Computational biologyDNA sequencingDistributed computingTask (project management)Alignment-free sequence comparison and analysisHadoopHardware and ArchitectureMathematics (all)Relevance (information retrieval)MapReducePattern matchingAlignment-free sequence comparison and analysiSoftware
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Static and dynamic glass transitions in the 10-state Potts glass: What can Monte Carlo simulations contribute?

2002

The p-state Potts glass with infinite range Gaussian interactions can be solved exactly in the thermodynamic limit and exhibits an unconventional phase behavior if p >4: A dynamical transition from ergodic to non-ergodic behavior at a temperature T D is followed by a first order transition at T 0 < T D, where a glass order parameter appears discontinuously, although the latent heat is zero. If one assumes that a similar scenario occurs for the structural glass transition as well (though with the singular behavior at T D rounded off), the p-state Potts glass should be a good test case to develop methods to deal with finite size effects for the static as well as the dynamic transition, and to…

Spin glassGaussianMonte Carlo methodExtrapolationGeneral Physics and Astronomysymbols.namesakeHardware and ArchitectureThermodynamic limitsymbolsErgodic theoryStatistical physicsGlass transitionMathematicsPotts modelComputer Physics Communications
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Interference excision algorithm for frequency hopping spread spectrum based on undecimated wavelet packet transform

2002

An algorithm for reducing narrowband interference effects in frequency hopping spread spectrum is presented. The method is based on the undecimated wavelet packet transform. It improves the performance obtained by other methods. Experimental results demonstrate the suitability of the algorithm.

Spread spectrumInterference excisionComputer scienceComputerSystemsOrganization_COMPUTER-COMMUNICATIONNETWORKSComputer Science::Networking and Internet ArchitectureElectronic engineeringFrequency-hopping spread spectrumElectrical and Electronic EngineeringAlgorithmWavelet packet decompositionElectronics Letters
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Digital background calibration algorithm and its FPGA implementation for timing mismatch correction of time-interleaved ADC

2019

Sample time error can degrade the performance of time-interleaved analog to digital converters (TIADCs). A fully digital background algorithm is presented in this paper to estimate and correct the timing mismatch errors between four interleaved channels, together with its hardware implementation. The proposed algorithm provides low computation burden and high performance. It is based on the simplified representation of the coefficients of the Lagrange interpolator. Simulation results show that it can suppress error tones in all of the Nyquist band. Results show that, for a four-channel TIADC with 10-bit resolution, the proposed algorithm improves the signal to noise and distortion ratio (SN…

Spurious-free dynamic rangeEnginyeria elèctricaComputer scienceDynamic rangeComputation020208 electrical & electronic engineering020206 networking & telecommunications02 engineering and technologySurfaces Coatings and FilmsData acquisitionHardware and ArchitectureSignal Processing0202 electrical engineering electronic engineering information engineeringElectronic engineeringNyquist–Shannon sampling theoremCircuits integratsSystem timeField-programmable gate arrayCommunication channel
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Magnetic domain-wall racetrack memory for high density and fast data storage

2012

The racetrack memory device is a new concept of Magnetic RAM (MRAM) based on controlling domain wall (DW) motion in ferromagnetic nanowires. It promises ultra-high storage density thanks to the possibility to store multiple narrow DWS per memory cell. By using read and write heads based on magnetic tunnel junctions (MTJ) with perpendicular magnetic anisotropy (PMA) fast data access speed can also be achieved. Thereby the racetrack memory can be used as universal storage to address both embedded and standalone applications. In this paper, we present the device physics, integration circuit and architecture designs of a racetrack memory based on MTJs with PMA. Mixed SPICE simulations at 65 nm …

Standalone applicationsMagnetic domainComputer scienceSpiceArchitecture designsMRAM devicesMemory cellElectronic engineeringRacetrack memoryPerpendicular magnetic anisotropyMagnetic domainsMagnetoresistive random-access memoryHardware_MEMORYSTRUCTURESIntegration circuitsNanowiresbusiness.industryMagnetic devicesElectrical engineeringNon-volatile memory technologyDomain wall motionTunnel magnetoresistanceData storage equipmentComputer data storageFerromagnetic nanowireNode (circuits)Magnetic tunnel junctionbusinessRandom access storage
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LoneStar RAID

2016

The need for huge storage archives rises with the ever growing creation of data. With today’s big data and data analytics applications, some of these huge archives become active in the sense that all stored data can be accessed at any time. Running and evolving these archives is a constant tradeoff between performance, capacity, and price. We present the LoneStar RAID, a disk-based storage architecture, which focuses on high reliability, low energy consumption, and cheap reads. It is designed for MAID systems with up to hundreds of disk drives per server and is optimized for “write once, read sometimes” workloads. We use dedicated data and parity disks, and export the data disks as individu…

Standard RAID levelsHardware_MEMORYSTRUCTURESRAIDDisk array controllerComputer sciencebusiness.industryDisk mirroring020206 networking & telecommunicationsFault tolerance02 engineering and technologycomputer.software_genreDisk Data Formatlaw.inventionHardware and Architecturelaw020204 information systemsEmbedded systemData_FILES0202 electrical engineering electronic engineering information engineeringOperating systemCacheNon-standard RAID levelsbusinesscomputerACM Transactions on Storage
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Importance of the Window Function Choice for the Predictive Modelling of Memristors

2021

Window functions are widely employed in memristor models to restrict the changes of the internal state variables to specified intervals. Here, we show that the actual choice of window function is of significant importance for the predictive modelling of memristors. Using a recently formulated theory of memristor attractors, we demonstrate that whether stable fixed points exist depends on the type of window function used in the model. Our main findings are formulated in terms of two memristor attractor theorems, which apply to broad classes of memristor models. As an example of our findings, we predict the existence of stable fixed points in Biolek window function memristors and their absenc…

State variableComputer science02 engineering and technologyMemristorType (model theory)Fixed pointTopologyWindow functionlaw.inventionPredictive modelsComputer Science::Hardware ArchitectureComputer Science::Emerging TechnologiesMathematical modellawAttractor0202 electrical engineering electronic engineering information engineeringEvolution (biology)Electrical and Electronic EngineeringPolarity (mutual inductance)threshold voltage020208 electrical & electronic engineeringmemristive systemsBiological system modeling020206 networking & telecommunicationsWindow functionmemristorsIntegrated circuit modelingPredictive modellingIEEE Transactions on Circuits and Systems Ii-Express Briefs
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