Search results for "Array"
showing 10 items of 1264 documents
A New Model for Sigma-Delta Modulator Oriented to Digitally Controlled DC/DC Converter
2007
Recent research activities have shown the feasibility and advantages of using digital controller ICs specifically developed for high-frequency switching converters, highlighting a challenging future trend in Switched-mode power supplies (SMPS) applications. Up to a few years ago, the application of digital control for SMPS was impractical due to the high cost and low performance of DSP and microcontroller systems, even if the advantages that digital controllers offer were well known, such as immunity to analog component variations and ability to implement sophisticated control schemes and system diagnostics. Digital controller ICs potentially offer other advantages from the integrated desig…
Adaptive Techniques for Microarray Image Analysis with Related Quality Assessment
2007
We propose novel techniques for microarray image analysis. In particular, we describe an overall pipeline able to solve the most common problems of microarray image analysis. We pro- pose the microarray image rotation algorithm (MIRA) and the statis- tical gridding pipeline (SGRIP) as two advanced modules devoted to restoring the original microarray grid orientation and to detecting, the correct geometrical information about each spot of input mi- croarray, respectively. Both solutions work by making use of statis- tical observations, obtaining adaptive and reliable information about each spot property. They improve the performance of the microarray image segmentation pipeline (MISP) we rec…
Information Processing Schemes Based on Monolayer Protected Metallic Nanoclusters
2011
Nanostructures are potentially useful as building blocks to complement future electronics because of their high versatility and packing densities. The fabrication and characterization of particular nanostructures and the use of new theoretical tools to describe their properties are receiving much attention. However, the integration of these individual systems into general schemes that could perform simple tasks is also necessary because modern electronics operation relies on the concerted action of many basic units. We review here new conceptual schemes that can allow information processing with ligand or monolayer protected metallic nanoclusters (MPCs) on the basis of the experimentally de…
On the performance of multi-GPU-based expert systems for acoustic localization involving massive microphone arrays
2015
Sound source localization is an important topic in expert systems involving microphone arrays, such as automatic camera steering systems, human-machine interaction, video gaming or audio surveillance. The Steered Response Power with Phase Transform (SRP-PHAT) algorithm is a well-known approach for sound source localization due to its robust performance in noisy and reverberant environments. This algorithm analyzes the sound power captured by an acoustic beamformer on a defined spatial grid, estimating the source location as the point that maximizes the output power. Since localization accuracy can be improved by using high-resolution spatial grids and a high number of microphones, accurate …
Energy balance in single exposure multispectral sensors
2013
International audience; Recent simulations of multispectral sensors are based on a simple Gaussian model, which includes filters transmittance and substrate absorption. In this paper we want to make the distinction between these two layers. We discuss the balance of energy by channel in multispectral solid state sensors and propose an updated simple Gaussian model to simulate multispectral sensors. Results are based on simulation of typical sensor configurations.
Design and Validation of a FPGA-Based HIL Simulator for Minimum Losses Control of a PMSM
2021
This work examines the FPGA programmable logic platforms applied to minimum losses control of a Permanent Magnet Synchronous Motor (PMSM), which represents a flexible solution for the implementation of an advanced digital control algorithm, given their intrinsic parallel structure and the capability to be directly reprogrammable in the field. In particular, design and validation of a FPGA-based Hardware-In-the-Loop (HIL) simulator is proposed, by investigating about data format, quantization and discretization effects and other issues arising during the experimental validation of a controller prototype, in order to reduce the embedded software development cycle and test control systems. The…
proTRAC - a software for probabilistic piRNA cluster detection, visualization and analysis
2012
Abstract Background Throughout the metazoan lineage, typically gonadal expressed Piwi proteins and their guiding piRNAs (~26-32nt in length) form a protective mechanism of RNA interference directed against the propagation of transposable elements (TEs). Most piRNAs are generated from genomic piRNA clusters. Annotation of experimentally obtained piRNAs from small RNA/cDNA-libraries and detection of genomic piRNA clusters are crucial for a thorough understanding of the still enigmatic piRNA pathway, especially in an evolutionary context. Currently, detection of piRNA clusters relies on bioinformatics rather than detection and sequencing of primary piRNA cluster transcripts and the stringency …
Implementation of JPEG2000 arithmetic decoder using dynamic reconfiguration of FPGA
2005
This paper describes implementation of a part of JPEG2000 algorithm (MQ-Decoder and arithmetic decoder) on a FPGA board using dynamic reconfiguration. Comparison between static and dynamic reconfiguration is presented and new analysis criteria (time performance, logic cost, spatio-temporal efficiency) are defined. MQ-decoder and arithmetic decoder can be classified in the most attractive case for dynamic reconfiguration implementation: applications without parallelism by functions. This implementation is done on an architecture designed to study dynamic reconfiguration of FPGAs: the ARDOISE architecture. The implementation obtained, based on four partial configurations of arithmetic decoder…
ValWorkBench: an open source Java library for cluster validation, with applications to microarray data analysis.
2015
Background: Cluster analysis is one of the most well known activities in scientific investigation and the object of research in many disciplines, ranging from statistics to computer science. It is central to the life sciences due to the advent of high throughput technologies, e.g., classification of tumors. In particular, in cluster analysis, it is of relevance to assess cluster quality and to predict the number of clusters in a dataset, if any. This latter task is usually performed via internal validation measures. Despite their potentially important role, both the use of classic internal validation measures and the design of new ones, specific for microarray data, do not seem to have grea…
Cost comparison of image rotation implantations on static and dynamic Reconfigurable FPGAs
2002
FPGA components are widely used today to perform various algorithms (digital filtering) in real time. The emergence of Dynamically Reconfigurable (DR) FPGAs made it possible to reduce the number of necessary resources to carry out an image processing application (tasks chain). We present in this article an image processing application (image rotation) that exploits the FPGA 's dynamic reconfiguration feature. A comparison is undertaken between the dynamic and static reconfiguration by using two criteria, cost and performance criteria. For the sake of testing the validity of our approach in terms of Algorithm and Architecture Adequacy, we realized an AT40K40 based board ARDOISE.