Search results for "Array"
showing 10 items of 1264 documents
CIPRNG: A VLSI Family of Chaotic Iterations Post-Processings for $\mathbb {F}_{2}$ -Linear Pseudorandom Number Generation Based on Zynq MPSoC
2018
Hardware pseudorandom number generators are continuously improved to satisfy both physical and ubiquitous computing security system challenges. The main contribution of this paper is to propose two post-processing modules in hardware, to improve the randomness of linear PRNGs while succeeding in passing the TestU01 statistical battery of tests. They are based on chaotic iterations and are denoted by CIPRNG-MC and CIPRNG-XOR. They have various interesting properties, encompassing the ability to improve the statistical profile of the generators on which they iterate. Such post-processing have been implemented on FPGA and ASIC without inferring any blocs (RAM or DSP). A comparison in terms of …
Optimized FPGA-implementation of quadrature DDS
2003
This paper presents the optimized implementation of high performance quadrature direct digital synthesizers (DDS). Although VLSI designs and optimizations have already been discussed in the literature they may not be successfully translated into an FPGA-based technology. This work examines each phase-to-amplitude mapping technique, such as ROM compression and partitioning techniques and the CORDIC algorithm, and it proposes the most suitable structure for Virtex FPGAs in order to obtain the most efficient implementation in terms of area and throughput.
An Embedded Real-Time Lane-Keeper for Automatic Vehicle Driving
2008
Automatic vehicle driving involves several issues, such as the capability to follow the road and keep the right lane, to maintain the distance between vehicles, to regulate vehiclepsilas speed, to find the shortest route to a destination. In this paper a real-time automatic lane-keeper is proposed. The main features of the system are the lane markers location process as well as the computation of the vehiclepsilas steering lock. The above techniques require high elaboration speed to execute, check and complete an operation before a prearranged time. Clearly if system processing exceeds the deadline, the whole operation became meaningless or, in the meantime, the vehicle can reach a critical…
Global Trigger Technological Demonstrator for ATLAS Phase-II upgrade
2020
ATLAS detector at the LHC will undergo a major Phase-II upgrade for the High Luminosity LHC. The upgrade affects all major ATLAS systems, including the Trigger and Data Acquisition systems. As part of the Level-0 Trigger System, the Global Trigger uses full-granularity calorimeter cells to perform algorithms, refines the trigger objects and applies topological requirements. The Global Trigger uses a Global Common Module as the building block of its design. To achieve a high input and output bandwidth and substantial processing power, the Global Common Module will host the most advanced FPGAs and optical modules. In order to evaluate the new generation of optical modules and FPGAs running at…
A Parallel Face Detection System Implemented on FPGA
2007
In this paper, we introduce a methodology for designing a system for face detection and its implementation on FPGA. The chosen face detection method is the well-known convolutional face finder (CFF) algorithm, which consists in a pipeline of convolutions and subsampling operations. Our goal is to define a parallel architecture able to process efficiently this algorithm. We present a dataflow based architecture algorithm adequation (AAA) methodology implemented using the SynDEx software, in order to find the best compromise between the processing power and functionality requirement of each processor element (PE), and the efficiency of algorithm parallelization. We describe a first implementa…
Convolutional architectures for virtual screening
2020
Abstract Background A Virtual Screening algorithm has to adapt to the different stages of this process. Early screening needs to ensure that all bioactive compounds are ranked in the first positions despite of the number of false positives, while a second screening round is aimed at increasing the prediction accuracy. Results A novel CNN architecture is presented to this aim, which predicts bioactivity of candidate compounds on CDK1 using a combination of molecular fingerprints as their vector representation, and has been trained suitably to achieve good results as regards both enrichment factor and accuracy in different screening modes (98.55% accuracy in active-only selection, and 98.88% …
Integrated Bayesian Approaches Shed Light on the Dissemination Routes of the Eurasian Grapevine Germplasm
2021
The domestication and spreading of grapevine as well as the gene flow history had been described in many studies. We used a high-quality 7k SNP dataset of 1,038 Eurasian grape varieties with unique profiles to assess the population genetic diversity, structure, and relatedness, and to infer the most likely migration events. Comparisons of putative scenarios of gene flow throughout Europe from Caucasus helped to fit the more reliable migration routes around the Mediterranean Basin. Approximate Bayesian computation (ABC) approach made possible to provide a response to several questions so far remaining unsolved. Firstly, the assessment of genetic diversity and population structure within a we…
iGEMS : an integrated model for identification of alternative exon usage events
2016
DNA microarrays and RNAseq are complementary methods for studying RNA molecules. Current computational methods to determine alternative exon usage (AEU) using such data require impractical visual inspection and still yield high false-positive rates. Integrated Gene and Exon Model of Splicing (iGEMS) adapts a gene-level residuals model with a gene size adjusted false discovery rate and exon-level analysis to circumvent these limitations. iGEMS was applied to two new DNA microarray datasets, including the high coverage Human Transcriptome Arrays 2.0 and performance was validated using RT-qPCR. First, AEU was studied in adipocytes treated with (n = 9) or without (n = 8) the anti-diabetes drug,…
Lightweight LCP construction for next-generation sequencing datasets
2012
The advent of "next-generation" DNA sequencing (NGS) technologies has meant that collections of hundreds of millions of DNA sequences are now commonplace in bioinformatics. Knowing the longest common prefix array (LCP) of such a collection would facilitate the rapid computation of maximal exact matches, shortest unique substrings and shortest absent words. CPU-efficient algorithms for computing the LCP of a string have been described in the literature, but require the presence in RAM of large data structures. This prevents such methods from being feasible for NGS datasets. In this paper we propose the first lightweight method that simultaneously computes, via sequential scans, the LCP and B…
WiSHFUL : enabling coordination solutions for managing heterogeneous wireless networks
2017
The paradigm shift toward the Internet of Things results in an increasing number of wireless applications being deployed. Since many of these applications contend for the same physical medium (i.e., the unlicensed ISM bands), there is a clear need for beyond-state-of-the-art solutions that coordinate medium access across heterogeneous wireless networks. Such solutions demand fine-grained control of each device and technology, which currently requires a substantial amount of effort given that the control APIs are different on each hardware platform, technology, and operating system. In this article an open architecture is proposed that overcomes this hurdle by providing unified programming i…