Search results for "Asynchronous communication"
showing 10 items of 65 documents
Stabilization and controller design of 2D discrete switched systems with state delays under asynchronous switching
2013
Published version of a paper from the journal: Abstract and Applied Analysis. Also available from Hindawi:http://dx.doi.org/10.1155/2013/961870. Open Access This paper is concerned with the problem of robust stabilization for a class of uncertain two-dimensional (2D) discrete switched systems with state delays under asynchronous switching. The asynchronous switching here means that the switching instants of the controller experience delays with respect to those of the system. The parameter uncertainties are assumed to be norm-bounded. A state feedback controller is proposed to guarantee the exponential stability. The dwell time approach is utilized for the stability analysis and controller …
Perceived Sociability and Social Presence in a Collaborative Serious Game
2013
Collaborative serious games have proven to have the potential to support joint knowledge construction, and there is a growing interest in applying such games to promote high-level learning. However, most of the existing studies have focused on the effects of functional, task-specific support while ignoring the social aspects of collaborative learning. This study is one aim to fill in the knowledge gap in order to understand how learners experience educational games as a means of social interaction and collaboration. The findings indicated that the game environment facilitated and supported players’ socio-emotional processes by eliciting students’ social presence and sociability. This has be…
Multi-user interference mitigation under limited feedback requirements for WCDMA systems with base station cooperation
2016
One of the techniques that has been recently identified for dealing with multi-user interference (MUI) in future communications systems is base station (BS) cooperation or joint processing. However, perfect MUI cancellation with this technique demands severe synchronization requirements, perfect and global channel state information (CSI), and an increased backhaul and signaling overhead. In this paper, we consider a more realistic layout with the aim of mitigating the MUI, where only local CSI is available at the BSs. Due to synchronization inaccuracies and errors in the channel estimation, the system becomes partially asynchronous. In the downlink of wideband code division multiple access …
EEG data acquisition system based on asynchronous sigma-delta modulator
2012
This paper describes a multichannel mobile EEG data acquisition system that consists of on-head sensors with built in electroencephalogram (EEG) signal amplifier, asynchronous sigma-delta modulator (ASDM) for analog to digital conversion and 434MHz On-Off keying (OOK) wireless data transmitter. A prototype circuit has been designed and fabricated in a 11×16mm cylinder package. After receiving the signal, appropriate processing is applied in order to reconstruct the brain wave signals.
The Asynchronous Leontief Model
1992
International audience; The traditional dynamic Leontief model is synchronous: every vertex acts simultaneously. A model with delays of action has been proposed, but it still remains synchronous. In this paper we propose an asynchronous version of the model that allows realistic computations. We fiurnish an algorithm and a program.
Randomized renaming in shared memory systems.
2021
Abstract Renaming is a task in distributed computing where n processes are assigned new names from a name space of size m . The problem is called tight if m = n , and loose if m > n . In recent years renaming came to the fore again and new algorithms were developed. For tight renaming in asynchronous shared memory systems, Alistarh et al. describe a construction based on the AKS network that assigns all names within O ( log n ) steps per process. They also show that, depending on the size of the name space, loose renaming can be done considerably faster. For m = ( 1 + ϵ ) ⋅ n and constant ϵ , they achieve a step complexity of O ( log log n ) . In this paper we consider tight as well as loos…
Robust H∞ reliable control for delta operator switched systems with time-varying delays under asynchronous switching
2014
The problem of robust H∞ reliable control for a class of delta operator switched systems with time-varying delays and actuator faults under asynchronous switching is considered in this paper. Asynchronous switching means that the switches between the candidate controllers and system modes are asynchronous. Based on the average dwell time approach and delta operator theory, a state feedback controller is designed such that the closed-loop system is exponentially stable with H∞ performance in the presence of actuator faults. The obtained results are formulated in the form of linear matrix inequalities (LMIs). Finally, a numerical example is provided to demonstrate explicitly the feasibility …
New fault detection filter design approach for continues-time switched systems
2012
This paper investigates the problem of fault detection filter design for continuous-time switched systems. The designed fault detection filter is assumed to be asynchronous with the original systems. Attention is focused on designing a fault detection filter such that the estimation error between the residual and the fault is minimized in the sense of H ∞ norm. By employing piecewise Lyapunov function and average dwell time techniques, a sufficient condition for the existence of such a filter is exploited in terms of certain linear matrix inequalities. Finally, an example is provided to illustrate the effectiveness of the proposed approach.
A Contribution to Tests Standardization for Inverter-Fed Asynchronous Machines
1986
Losses of inverter-fed asynchronous motors and their experimental evaluation are considered. The formal expressions of iron and copper losses are first recalled, and it is shown as they are influenced by the harmonic content of inverter output voltages. Theoretical and experimental values of these losses are then given together with the presentation of the experimental tests used for their determination. A suitable set of tests is then suggested for the determination of the conventional efficiency of inverter-fed asynchronous motors. The content cannot be considered exhaustive on the matter. It represents only a first contributive approach to the standardization of inverter-fed asynchronous…
An AER handshake-less modular infrastructure PCB with x8 2.5Gbps LVDS serial links
2014
Nowadays spike-based brain processing emulation is taking off. Several EU and others worldwide projects are demonstrating this, like SpiNNaker, BrainScaleS, FACETS, or NeuroGrid. The larger the brain process emulation on silicon is, the higher the communication performance of the hosting platforms has to be. Many times the bottleneck of these system implementations is not on the performance inside a chip or a board, but in the communication between boards. This paper describes a novel modular Address-Event-Representation (AER) FPGA-based (Spartan6) infrastructure PCB (the AER-Node board) with 2.5Gbps LVDS high speed serial links over SATA cables that offers a peak performance of 32-bit 62.5…