Search results for "CMO"

showing 10 items of 145 documents

Smart camera design for realtime High Dynamic Range imaging

2011

International audience; Many camera sensors suffer from limited dynamic range. The result is that there is a lack of clear details in displayed images and videos. This paper describes our approach to generate high dynamic range (HDR) from an image sequence while modifying exposure times for each new frame. For this purpose, we propose an FPGA-based architecture that can produce a real-time high dynamic range video from successive image acquisition. Our hardware platform is build around a standard low dynamic range CMOS sensor and a Virtex 5 FPGA board. The CMOS sensor is a EV76C560 provided by e2v. This 1.3 Megapixel device offers novel pixel integration/readout modes and embedded image pre…

[ INFO.INFO-TS ] Computer Science [cs]/Signal and Image Processing[INFO.INFO-TS] Computer Science [cs]/Signal and Image ProcessingComputer scienceComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION02 engineering and technology[ SPI.SIGNAL ] Engineering Sciences [physics]/Signal and Image processingACM IEEEImagingVideosHardware[INFO.INFO-TS]Computer Science [cs]/Signal and Image ProcessingHigh-dynamic-range imaging0202 electrical engineering electronic engineering information engineeringComputer visionSmart cameraImage sensorImage resolutionHigh dynamic range[SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processingPipelinesCMOS sensorDynamic rangePixelbusiness.industrySensors020208 electrical & electronic engineeringReal time systems020207 software engineeringFrame rate[SPI.TRON]Engineering Sciences [physics]/Electronics[ SPI.TRON ] Engineering Sciences [physics]/ElectronicsArtificial intelligencebusiness[SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing
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HDR-ARtiSt: High Dynamic Range Advanced Real-Time Imaging System

2012

International audience; This paper describes the HDR-ARtiSt hardware platform, a FPGA-based architecture that can produce a real- time high dynamic range video from successive image acquisition. The hardware platform is built around a standard low dynamic range (LDR) CMOS sensor and a Virtex 5 FPGA board. The CMOS sensor is a EV76C560 provided by e2v. This 1.3 Megapixel device offers novel pixel integration/readout modes and em- bedded image pre-processing capabilities including multiframe acquisition with various exposure times. Our approach consists of a hardware architecture with different algorithms: double exposure control during image capture, building of an HDR image by combining the…

[ INFO.INFO-TS ] Computer Science [cs]/Signal and Image Processing[INFO.INFO-TS] Computer Science [cs]/Signal and Image ProcessingComputer scienceHardware platformReal-time computingComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISIONImage processingVideo camera02 engineering and technologyTone mapping[ SPI.SIGNAL ] Engineering Sciences [physics]/Signal and Image processinglaw.invention[INFO.INFO-TS]Computer Science [cs]/Signal and Image ProcessinglawHistogram0202 electrical engineering electronic engineering information engineeringHigh dynamic rangeFPGA[SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processingHardware architectureCMOS sensorLiquid-crystal displayreal timePixelbusiness.industryDynamic range020207 software engineeringHigh Dynamic RangeFrame rate[SPI.TRON] Engineering Sciences [physics]/Electronics[ SPI.TRON ] Engineering Sciences [physics]/Electronicsimage processing[SPI.TRON]Engineering Sciences [physics]/ElectronicsIEEE020201 artificial intelligence & image processingbusiness[SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processingComputer hardware
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eISP, une architecture de calcul programmable pour l'amélioration d'images sur téléphone portable.

2009

4 pages; Today's smart phones, with their embedded high-resolution video sensors, require computing capacities that are too high to easily meet stringent silicon area and power consumption requirements (some one and a half square millimeters and half a watt) especially when programmable components are used. To develop such capacities, integrators still rely on dedicated low resolution video processing components, whose drawback is low flexibility. With this in mind, our paper presents eISP {--} a new, fully programmable Embedded Image Signal Processor architecture, now validated in {TSMC~65nm} technology to achieve a capacity of {16.8~GOPs} at {233~MHz}, for {1.5~mm$^2$} of silicon area and…

[ INFO.INFO-TS ] Computer Science [cs]/Signal and Image Processinglow power[INFO.INFO-TS] Computer Science [cs]/Signal and Image ProcessingCMOS[ SPI.SIGNAL ] Engineering Sciences [physics]/Signal and Image processingeISPSIMDvideo pipeimage processing[INFO.INFO-MC]Computer Science [cs]/Mobile ComputingMulti-SIMD[INFO.INFO-MC] Computer Science [cs]/Mobile Computing[INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing[ INFO.INFO-MC ] Computer Science [cs]/Mobile Computing[SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing[SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing
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eISP: a Programmable Processing Architecture for Smart Phone Image Enhancement

2009

4 pages; Today's smart phones, with their embedded high-resolution video sensors, require computing capacities that are too high to easily meet stringent silicon area and power consumption requirements (some one and a half square millimeters and half a watt) especially when programmable components are used. To develop such capacities, integrators still rely on dedicated low resolution video processing components, whose drawback is low flexibility. With this in mind, our paper presents eISP {--} a new, fully programmable Embedded Image Signal Processor architecture, now validated in {TSMC 65nm} technology to achieve a capacity of {16.8 GOPs} at {233 MHz}, for {1.5 mm$^2$} of silicon area and…

[ INFO.INFO-TS ] Computer Science [cs]/Signal and Image Processinglow power[INFO.INFO-TS] Computer Science [cs]/Signal and Image ProcessingCMOSdemosaïcking[ SPI.SIGNAL ] Engineering Sciences [physics]/Signal and Image processingeISPmm²SIMDimage processingvideo pipesmall siliconMulti-SIMDcomputing tilemilliwatt[INFO.INFO-TS]Computer Science [cs]/Signal and Image ProcessingsensordemosaicingTSMC 65nm[SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing[SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing
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Extensions matérielles pour processeurs embarqués de traitement d'images.

2007

12p; Le marché des imageurs embarqués est entré dans une ère nouvelle avec l'avènement des téléphones portables munis d'appareils photographiques et de caméras. Il est attendu qu'à l'horizon 2009, leur nombre dépassera celui de l'ensemble des appareils photos vendus depuis l'invention de la photographie, et ce qu'ils soient numériques ou non. Le marché des imageurs électroniques embarqués est donc un secteur porteur, notamment au travers de la téléphonie et de la visiophonie mobile. Les applications ne sont plus limitées à la simple photographie ou la transmission de vidéo ; les lecteurs de codes matrices, la reconnaissance de visages, la biométrie, ou la vision 3D sont des exemples parmi l…

[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR][INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR]embarquéCMOSprocesseur[ INFO.INFO-AR ] Computer Science [cs]/Hardware Architecture [cs.AR]imageaméliorationC.1 C.3 C.4 I.4
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Compression embarquée temps réel pour caméras rapides

2005

Les caméras rapides sont de puissants outils pour étudier, par exemple, la dynamique des fluides ou le déplacement des pièces mécaniques lors d'un processus de fabrication. Nous décrivons dans ce papier, un nouveau type de caméra rapide possédant un fonctionnement original. En effet, outre le fait qu'elle utilise comme d'autres caméras, la grande flexibilité des capteurs CMOS en termes d'acquisition (ROI), elle est novatrice au niveau du transfert des données. Celles-ci pouvant être à la fois traitées et/ou compressées en temps réel au sein même de la caméra. Le transfert peut s'effectuer alors à l'aide d'une simple connection série de type USB 2.0. On réalise ainsi l'économie d'une mémoire…

[INFO.INFO-OH] Computer Science [cs]/Other [cs.OH]Capteur CMOSCompression d'image[INFO.INFO-OH]Computer Science [cs]/Other [cs.OH][ INFO.INFO-OH ] Computer Science [cs]/Other [cs.OH]compression d'imagestemps réelFPGAVidéo rapide
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Puente a trasplante cardiaco con oxigenación de membrana extracorpórea

2012

PUENTE A TRASPLANTE CARDIACO CON OXIGENACIÓN DE MEMBRANA EXTRACORPÓREA Objetivos: Los nuevos sistemas de Oxigenación de Membrana Extracorpórea (ECMO) han presentado un desarrollo tecnológico notable, fundamentalmente debido a la incorporación de oxigenadores y bombas centrífugas de larga duración, lo cual ha conducido a una importante mejoría en la supervivencia de los pacientes en shock cardiogénico refractario tratados con este tipo de asistencia mecánica circulatoria de corta duración. La implantación de este dispositivo por vía periférica de forma sencilla, rápida y poco agresiva en estos pacientes en shock cardiogénico con signos incipientes de fracaso multiorgánico puede mejorar su su…

bridge to transplantationUNESCO::CIENCIAS MÉDICASecmopuente a trasplante:CIENCIAS MÉDICAS [UNESCO]heart transplantationtrasplante cardiaco
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CMOS Capacitance-to-Time Converter-Based Interface for Differential Capacitive Sensors

2020

This paper presents pre-layout simulation results on a CMOS implementation of a capacitance-to-time converter-based electronic interface for differential capacitive sensors. Its simple architecture, comprising only three operational amplifiers (OA) and a digital mixer (inverted XOR gate) allows, by properly setting the values of seven biasing resistors, to fit the working range anywhere from few fF to hundreds of pF, giving the output quasi-digital signals (T and PW) in the useful μs-ms range (appropriate for direct interfacing with general purposes microcontrollers). A couple of illustrative examples are provided.

business.industryComputer scienceCapacitive sensingElectrical engineeringCapacitancelaw.inventionMicrocontrollerCMOSInterfacinglawHardware_INTEGRATEDCIRCUITSOperational amplifierResistorbusinessXOR gate2020 Global Congress on Electrical Engineering (GC-ElecEng)
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Optoelectronic Module with Integrated Transceiver and Mux-Demux for Optical Interconnect Applications

2019

The design, development and improvtableement in electronic devices and components have led to the further miniaturization of the system devices and their interconnecting interfaces. Hence, reducing the size of the transmitter (Tx) chips, receiver (Rx) chips and associated components play an important role in designing a reduced/small sized optoelectronic modules for optical interconnect applications. Some of the associated components include multiplexer, demultiplexer, clock and data recovery circuits (CDR), etc. Therefore, in this paper we present an optoelectronic module with integrated transceiver (Tx-Rx) and multiplexer-demultiplexer (mux-demux) with the aim of reducing the total area o…

business.industryComputer scienceOptical linkOptical interconnectGeneral EngineeringTopology (electrical circuits)ChipMultiplexerCMOSHardware_INTEGRATEDCIRCUITSOptoelectronicsElectronicsTransceiverbusinessAmerican Journal of Optics and Photonics
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Comunità e spazio pubblico. Come generare la dimensione spaziale della democrazia

2021

The contribution addresses the issue of the spatial dimension of democracy in the neo-cosmopolitan city, also as an expression of the communities living in it. By highlighting the inequalities still present, which translate into marginality of communities and urban spaces, the contribution claims the importance of public space in the relations between community and city and proposes operational methods through project examples in the city of Palermo.

community public space urban democracy neocmopolitanismSettore ICAR/21 - Urbanistica
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