Search results for "CORDIC"
showing 2 items of 2 documents
Area-efficient FPGA-based FFT processor
2003
A novel architecture for computing the fast Fourier transform on programmable devices is presented. Main results indicate that the use of one CORDIC operator to perform the multiplication by all the ‘twiddle factors’ sequentially leads to an area saving up to 35% with respect to other cores.
Optimisation of direct digital frequency synthesisers based on CORDIC
2001
Methods to simplify digital frequency synthesizers based on the co-ordinate rotation digital computer (CORDIC) algorithm are presented. Application of these methods leads to performance enhancement, compared with the topologies previously proposed in the literature. For a given output precision, hardware resources are reduced and spur-free dynamic range is increased.