Search results for "Computer Hardware"
showing 10 items of 378 documents
<title>Achieving high performances at lower cost for real-time image rotation by using dynamic reconfiguration</title>
2001
FPGA components are widely used today to perform various algorithms (digital filtering) in real time. The emergence of Dynamically Reconfigurable (DR) FPGAs made it possible to reduce the number of necessary resources to carry out an image processing application (tasks chain). We present in this article an image processing application (image rotation) that exploits the FPGA's dynamic reconfiguration feature. A comparison is undertaken between the dynamic and static reconfiguration by using two criteria, cost and performance criteria. For the sake of testing the validity of our approach in terms of Algorithm and Architecture Adequacy , we realized an AT40K40 based board ARDOISE.
The ATLAS Level-1 Calorimeter Trigger: PreProcessor implementation and performance
2012
The PreProcessor system of the ATLAS Level-1 Calorimeter Trigger (L1Calo) receives about 7200 analogue signals from the electromagnetic and hadronic components of the calorimetric detector system. Lateral division results in cells which are pre-summed to so-called Trigger Towers of size 0.1 × 0.1 along azimuth (phi) and pseudorapidity (η). The received calorimeter signals represent deposits of transverse energy. The system consists of 124 individual PreProcessor modules that digitise the input signals for each LHC collision, and provide energy and timing information to the digital processors of the L1Calo system, which identify physics objects forming much of the basis for the full ATLAS fi…
The Optical Multiplexer Board for the ATLAS Hadronic Tile Calorimeter
2007
This paper presents the architecture and the status of the optical multiplexer board (OMB) for the ATLAS/LHC tile hadronic calorimeter (TileCal). This board will analyze the front-end data CRC to prevent bit and burst errors produced by radiation. Besides, due to its position within the data acquisition chain it will be used to emulate front-end data for tests. The first two prototypes of the final OMB 9U version have been produced at CERN. Detailed design issues and manufacturing features of these prototypes are described. These prototypes are being validated while firmware developments are being implemented in the programmable devices of the board.
Ultrascale+ for the new ATLAS calorimeter trigger board dedicated to jet identification
2018
To cope with the expected increase in luminosity at the Large Hadron Collider in 2021, the ATLAS collaboration is planning a major detector upgrade to be installed during Long Shutdown 2. As a part of this, the Level 1 trigger, based on calorimeter data, will be upgraded to exploit the fine granularity readout using a new system of Feature EXtractors (FEXs), which each reconstruct different physics objects for the trigger selection. The Jet FEX (jFEX) is one of three FEXs and has been conceived to identify small/large area jets, large area tau leptons, missing transverse energy and the total sum of the transverse energy. The use of the latest generation Xilinx Field Programmable Gate Array …
Upgrade of the ATLAS Central Trigger for LHC Run-2
2015
The increased energy and luminosity of the LHC in the run-2 data taking period requires a more selective trigger menu in order to satisfy the physics goals of ATLAS. Therefore the electronics of the central trigger system is upgraded to allow for a larger variety and more sophisticated trigger criteria. In addition, the software controlling the central trigger processor (CTP) has been redesigned to allow the CTP to accommodate three freely configurable and separately operating sets of sub detectors, each independently using the almost full functionality of the trigger hardware. This new approach and its operational advantages are discussed as well as the hardware upgrades.
A Scheme for Continuous Input to the Tsetlin Machine with Applications to Forecasting Disease Outbreaks
2019
In this paper, we apply a new promising tool for pattern classification, namely, the Tsetlin Machine (TM), to the field of disease forecasting. The TM is interpretable because it is based on manipulating expressions in propositional logic, leveraging a large team of Tsetlin Automata (TA). Apart from being interpretable, this approach is attractive due to its low computational cost and its capacity to handle noise. To attack the problem of forecasting, we introduce a preprocessing method that extends the TM so that it can handle continuous input. Briefly stated, we convert continuous input into a binary representation based on thresholding. The resulting extended TM is evaluated and analyzed…
A formal proof of the e-optimality of discretized pursuit algorithms
2015
Learning Automata (LA) can be reckoned to be the founding algorithms on which the field of Reinforcement Learning has been built. Among the families of LA, Estimator Algorithms (EAs) are certainly the fastest, and of these, the family of discretized algorithms are proven to converge even faster than their continuous counterparts. However, it has recently been reported that the previous proofs for ??-optimality for all the reported algorithms for the past three decades have been flawed. We applaud the researchers who discovered this flaw, and who further proceeded to rectify the proof for the Continuous Pursuit Algorithm (CPA). The latter proof examines the monotonicity property of the proba…
A Survey on Sensors for Autonomous Systems
2020
This paper presents a survey on state-of-the-art sensors for autonomous systems. The key performance parameters along with the operating principle of sensors used in autonomous systems are thoroughly explored. Practical aspects such as performance parameters, sensor output data format, sensor interfaces, size, power consumption, compatible hardware platforms, data analysis, and signal processing complexities are summarized. Such information serves as a practical guide for designing smart sensing systems for autonomous systems.
Performance and Implementation Modeling of Gated Linear Networks on FPGA for Lossless Image Compression
2020
Over recent years, imaging systems have seen explosive increase in resolution. These trends present a challenge for resource-constrained embedded imaging devices. Efficient image compression is essential to reduce bandwidth consumption and to increase the capability of on-board storage. Especially, for imaging systems where information loss is not allowed, for example, in medical, military and remote sensing imaging systems. This paper explores the use of Gated Linear Networks (GLNs) for development of embedded lossless compression systems. GLNs have proved themselves via PAQ archiver series, that have been ranked among the top across several lossless compression benchmarks. We propose an a…
A Novel System for Measuring Damaging Impacts on Table Olives
2015
The consumer today demands high quality products; fruit with defects or in poor condition generate dissatisfaction and a consequent reduction in consumption. In recent years, interesting systems have been used (i. e. "artificial fruit") in order to identify the cause of damage during mechanical harvesting and/or post-harvest operations. In this paper, the authors present a new system designed to measure the impacts received by table olives in the processing stages from harvesting to packaging. The device is an instrumented sphere designed and implemented by the Agricultural Mechanics Section of the Department of Agricultural and Forest Sciences, University of Palermo, Italy. It contains a t…