Search results for "Fpga"
showing 10 items of 129 documents
FPGA based digital lock-in amplifier for fNIRS systems
2018
Lock-In Amplifiers (LIA) represent a powerful technique helping to improve signals detectability when low signal to noise ratios are experienced. Continuous Wave functional Near Infrared Spectroscopy (CW-fNIRS) systems for e-health applications usually suffer of poor detection due to the presence of strong attenuations of the optical recovering path and therefore small signals are severely dipped in a high noise floor. In this work a digital LIA system, implemented on a Zynq® Field Programmable Gate Array (FPGA), has been designed and tested to verify the quality of the developed solution, when applied in fNIRS systems. Experimental results have shown the goodness of the proposed solutions.
Spiking Neural Networks models targeted for implementation on Reconfigurable Hardware
2017
La tesis presentada se centra en la denominada tercera generación de redes neuronales artificiales, las Redes Neuronales Spiking (SNN) también llamadas ‘de espigas’ o ‘de eventos’. Este campo de investigación se convirtió en un tema popular e importante en la última década debido al progreso de la neurociencia computacional. Las Redes Neuronales Spiking, que tienen no sólo la plasticidad espacial sino también temporal, ofrecen una alternativa prometedora a las redes neuronales artificiales clásicas (ANN) y están más cerca de la operación real de las neuronas biológicas ya que la información se codifica y transmite usando múltiples espigas o eventos en forma de trenes de pulsos. Este campo h…
Contributions to Phase Two of AGATA electronics
2020
En el campo de la física nuclear, la espectroscopia de rayos gamma de alta resolución es un método preciso para estudiar la estructura del núcleo, extrayendo la energía y la distribución angular de los fotones gamma emitidos en las transiciones entre estados nucleares. Para obtener núcleos en un estado excitado y por tanto emitan rayos gamma, hemos de hacer chocar la materia, produciendo reacciones nucleares (espectroscopia de haz) o recurrir a desintegraciones radiactivas (espectroscopia de desintegración). Los detectores de semiconductor de germanio de alta pureza (HPGe) han demostrado tener una buena respuesta interaccionando con rayos gamma. Al igual que otros detectores de basados en s…
Sistema de transferencia de datos en el instrumento TilePPr del proyecto TileCal
2017
El proyecto surge de la implementación del nuevo sistema de lectura de datos FELIX, que aprovecha los Transceptores Gigabit incorporados en las FPGA XC7VX485T y XC7VX690T del fabricante Xilinx. Estos transceptores se usan para establecer enlaces de datos a través de fibra óptica entre la FPGA del Pre-procesador del TileCal o TilePPr (XC7VX485T) y la placa electrónica que está conectada por PCIe al servidor local (XC7VX690T), por lo que el trabajo consiste en alcanzar los siguientes objetivos: a) Poner en marcha en la FPGA XC7VX485T del Pre-procesador o TilePPr la interfaz de transferencia de datos para que sea compatible con el nuevo sistema “Enlace de intercambio en el límite frontal” o FE…
Contribuciones al procesado hardware de la señal para detectores de radiación de alta resolución espacial con lectura por matriz de fotodiodos : dise…
2013
Aplicaciones de física médica y nuclear para el diagnóstico por imagen o la radioterapia de alta precisión, así como otras de carácter industrial, tales como la implantación iónica en microelectrónica, requieren de dispositivos capaces de conocer la posición de un haz de partículas con alta resolución. El detector de radiación utilizado para determinar la posición de interacción de una partícula o de un haz, en éstas y otras aplicaciones físicas, se denomina hodoscopio, y su función es proporcionar la característica espacial del haz. La tecnología basada en fibra óptica centelleadora es una solución al problema de posicionamiento de alta precisión que ha ido adquiriendo importancia en los ú…
Design exploration of aes accelerators on FPGAS and GPUs
2017
The embedded systems are increasingly becoming a key technological component of all kinds of complex tech-nical systems and an exhaustive analysis of the state of the art of all current performance with respect to architectures, design methodologies, test and applications could be very in-teresting. The Advanced Encryption Standard (AES), based on the well-known algorithm Rijndael, is designed to be easily implemented in hardware and software platforms. General purpose computing on graphics processing unit (GPGPU) is an alternative to recongurable accelerators based on FPGA devices. This paper presents a direct comparison between FPGA and GPU used as accelerators for the AES cipher. The res…
A Hardware and Secure Pseudorandom Generator for Constrained Devices
2018
Hardware security for an Internet of Things or cyber physical system drives the need for ubiquitous cryptography to different sensing infrastructures in these fields. In particular, generating strong cryptographic keys on such resource-constrained device depends on a lightweight and cryptographically secure random number generator. In this research work, we have introduced a new hardware chaos-based pseudorandom number generator, which is mainly based on the deletion of an Hamilton cycle within the $N$ -cube (or on the vectorial negation), plus one single permutation. We have rigorously proven the chaotic behavior and cryptographically secure property of the whole proposal: the mid-term eff…
Efficient MLP Digital Implementation on FPGA
2005
The efficiency and the accuracy of a digital feed-forward neural networks must be optimized to obtain both high classification rate and minimum area on chip. In this paper an efficient MLP digital implementation. The key features of the hardware implementation are the virtual neuron based architecture and the use of the sinusoidal activation function for the hidden layer. The effectiveness of the proposed solutions has been evaluated developing different FPGA based neural prototypes for the High Energy Physics domain and the automatic Road Sign Recognition domain. The use of the sinusoidal activation function decreases hardware resource employment of about 32% when compared with the standar…
Field Oriented Control of IPMSM Fed by Multilevel Cascaded H-Bridges Inverter with NI-SOM sbRIO-9651 FPGA controller
2022
Electrical drives fed by Multilevel Inverters (MIs) are of considerable interest for traction and e-mobility applications. In detail, Cascaded H-Bridge Multilevel Inverter (CHBMI) is a promising solution for electrical drive optimization purposes in terms of efficiency, safety, integration and flexible use of energy sources. The aim of this paper is the experimental implementation of the field-oriented control strategy of Interior Permanent Magnet Synchronous Machine (IPMSM) fed by CHBMI by use of NI-SOM sbrRIO-9651 FPGA controller. This FPGA controller can be programmable in the LabVIEW programming environment with the consequent benefits of graphical programming. The paper address the acq…
The TileCal Optical Multiplexer Board 9U
2011
Abstract TileCal is the hadronic calorimeter of the ATLAS experiment at LHC/CERN. The system contains roughly 10,000 channels of read-out electronics, whose signals are gathered and digitized in the front-end electronics and then transmitted to the counting room through two redundant optical links. Then, the data is received in the back-end system by the Optical Multiplexer Board (OMB) 9U which performs a CRC check to the redundant data to avoid Single Event Upsets errors. A real-time decision is taken on the event-to-event basis to transmit single data to the Read-Out Drivers (RODs) for processing. Due to the low dose level expected during the first years of operations in ATLAS it was deci…