Search results for "Gate"
showing 10 items of 1811 documents
Intertemporal Substitution in the Spanish Economy: Evidence from Regional Data*
2018
This paper studies the intertemporal substitution in consumption and leisure for the Spanish economy by estimating the first‐order conditions of an individual optimization model with regional and aggregate data. While first‐order conditions determining intertemporal substitution in consumption show a good econometric fit, and the value we obtain for the intertemporal elasticity of substitution is similar to previously available results, the econometric fit of the intertemporal condition in leisure indicates that the behaviour of the Spanish labour supply over the cycle is more complex than can be explained by the canonical intertemporal choice model.
On Behavioral Heterogeneity
2006
An index of “behavioral heterogeneity” for every finite population of households is defined. It is shown that the higher the index of behavioral heterogeneity the less sensitive depends the aggregate consumption expenditure ratio upon prices. As a consequence, a high index implies a tendency for the Jacobian of aggregate demand to have a dominant negative diagonal.
Experimental Investigation on the Performances of a Multilevel Inverter Using a Field Programmable Gate Array-Based Control System
2019
The Field Programmable Gate Array (FPGA) represents a valid solution for the design of control systems for inverters adopted in many industry applications, because of both its high flexibility of use and its high-performance with respect to other types of digital controllers. In this context, this paper presents an experimental investigation on the harmonic content of the voltages produced by a three-phase, five level cascaded H-Bridge Multilevel inverter with an FPGA-based control board, aiming also to evaluate the performance of the FPGA through the implementation of the main common modulation techniques and the comparison between simulation and experimental results. The control algorithm…
Energy Efficiency Evaluation of Dynamic Partial Reconfiguration in Field Programmable Gate Arrays: An Experimental Case Study
2018
Both computational performances and energy efficiency are required for the development of any mobile or embedded information processing system. The Internet of Things (IoT) is the latest evolution of these systems, paving the way for advancements in ubiquitous computing. In a context in which a large amount of data is often analyzed and processed, it is mandatory to adapt node logic and processing capabilities with respect to the available energy resources. This paper investigates under which conditions a partially reconfigurable hardware accelerator can provide energy saving in complex processing tasks. The paper also presents a useful analysis of how the dynamic partial reconfiguration te…
Time-harmonic solution for acousto-elastic interaction with controllability and spectral elements
2010
The classical way of solving the time-harmonic linear acousto-elastic wave problem is to discretize the equations with finite elements or finite differences. This approach leads to large-scale indefinite complex-valued linear systems. For these kinds of systems, it is difficult to construct efficient iterative solution methods. That is why we use an alternative approach and solve the time-harmonic problem by controlling the solution of the corresponding time dependent wave equation. In this paper, we use an unsymmetric formulation, where fluid-structure interaction is modeled as a coupling between pressure and displacement. The coupled problem is discretized in space domain with spectral el…
On some close to convex functions with negative coefficients
2007
In this paper we propose for study a class of close to convex functions with negative coefficients defined by using a modified Salagean operator. .
Area-efficient FPGA-based FFT processor
2003
A novel architecture for computing the fast Fourier transform on programmable devices is presented. Main results indicate that the use of one CORDIC operator to perform the multiplication by all the ‘twiddle factors’ sequentially leads to an area saving up to 35% with respect to other cores.
Solubilization of Nitropropane in Copolymer and Surfactant-Copolymer Aggregates
2008
Smart camera based on an Embedded HW/SW Co-Processor
2008
Abstract This paper describes an image acquisition and a processing system based on a new coprocessor architecture designed for CMOS sensor imaging. The system exploits the full potential CMOS selective access imaging technology because the coprocessor unit is integrated into the image acquisition loop. The acquisition and coprocessing architecture are compatible with the majority of CMOS sensors. It enables the dynamic selection of a wide variety of acquisition modes as well as the reconfiguration and implementation of high-performance image preprocessing algorithms (calibration, filtering, denoising, binarization, pattern recognition). Furthermore, the processing and data transfer, from t…
FPGA-based concurrent watchdog for real-time control systems
2003
A straightforward and efficient implementation of a custom concurrent watchdog processor for real-time control systems is presented. Emphasis is given to the techniques used for on-line checking the main processor activity without adding overhead, and to the advantages of a field programmable gate array implementation.