Search results for "Hardware_PERFORMANCEANDRELIABILITY"
showing 10 items of 91 documents
Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems
2006
Advances in circuitry integration increase the probability of occurrence of transient faults in VLSI systems. A confident use of these systems requires the study of their behaviour in the presence of such faults. This study can be conducted using model-based fault injection techniques. In that context, field-programmable gate arrays (FPGAs) offer a great promise by enabling those techniques to execute models faster. This paper focuses on how run-time reconfiguration techniques can be used for emulating the occurrence of transient faults in VLSI models. Although the use of FPGAs for that purpose has been restricted so far to the well-known bit-flip fault model, recent studies in fault repres…
Fault Emulation for Dependability Evaluation of VLSI Systems
2008
Advances in semiconductor technologies are greatly increasing the likelihood of fault occurrence in deep-submicrometer manufactured VLSI systems. The dependability assessment of VLSI critical systems is a hot topic that requires further research. Field-programmable gate arrays (FPGAs) have been recently pro posed as a means for speeding-up the fault injection process in VLSI systems models (fault emulation) and for reducing the cost of fixing any error due to their applicability in the first steps of the development cycle. However, only a reduced set of fault models, mainly stuck-at and bit-flip, have been considered in fault emulation approaches. This paper describes the procedures to inje…
Novel voltage-controlled conditioning circuit applied to the ISFETs temporary drift and thermal dependency
2003
This paper describes a novel conditioning circuit applied to ion-sensitive field-effect transistors/membrane-ion-sensitive field-effect transistors (ISFETs/MEMFETs) sensors. The novel conditioning circuit allows the sensor polarization with the needed either voltage or current required in each application, thanks to two completely independent voltage-controlled blocks (current and voltage blocks). The control of the voltage block is the most critical point in our design because the voltage block maintains the sensor feedback stable, avoiding the thermal and temporary drifts of the sensor feedback.
Simulation of parasitic effects on Silicon Carbide devices for automotive electric traction
2020
Wide Band Gap (WBG) semiconductors are increasingly addressed towards Electric Vehicle (EV) applications, due to their significant advantages in terms of high-voltage and low-losses performances, suitable for high power applications. Nevertheless, the packaging in WBG devices represents a challenge for designers due to the notable impact that inductive and capacitive parasitic components can bring in high switching frequency regime in terms of noise and power losses. In this paper, a comparison between conventional Silicon (Si) and emerging Silicon-Carbide (SiC) power switching devices is presented. The effects of inductive parasitic effects and switching frequency are investigated in simul…
Equivalent Circuit Modelling of Ferrite Inductors Losses
2018
The modelling of the magnetic losses in the core of ferrite inductors for power conversion circuits has been considered in this paper. On the basis of the Revised Generalized Steinmetz Model (RGSE) an equivalent circuital modelling has been obtained. The losses are modelled as an equivalent resistance connected in parallel to the inductor. The model has been tested under periodic triangular current waveforms.
Optimal matching between optical rectennas and harvester circuits
2017
This paper deals with optimal coupling issues between rectennas and harvesting circuits. An optical rectenna consists of a nanoantenna usually coupled with an ultra-high speed rectifier. These devices aim to receive and convert solar and thermal radiation in a DC voltage, while a harvester circuit provides the energy to be stored. The rectenna impedance is influenced both by its structure and by the rectifying diode, the harvester circuit impedance has to be matched to optimize the power transfer. The purpose of this contribution is to discuss the best impedance conditions by taking into account the constraints that are due to the individual devices the conversion system consist of. Finally…
Design and simulation of efficient combinational circuits based on a new XOR structure in QCA technology
2021
AbstractQuantum-dot cellular automata (QCA), due to its unique characteristics like low power consumption, nanoscale design, and high computing speed is considered as an emerging technology, and it can be used as an alternative for CMOS technology in circuit design for quantum computers in the near future. XOR gate has many applications in the design of digital circuits in QCA. In this paper, an efficient novel structure of XOR gate is proposed in QCA. Also, a novel 1-bit comparator circuit, 1-bit full adder, binary to gray and gray to binary convertor code based on the proposed XOR is designed and simulated using QCADesigner 2.0.3. The simulation results demonstrated that the proposed stru…
SEU characterization of commercial and custom-designed SRAMs based on 90 nm technology and below
2020
International audience; The R2E project at CERN has tested a few commercial SRAMs and a custom-designed SRAM, whose data are complementary to various scientific publications. The experimental data include low- and high-energy protons, heavy ions, thermal, intermediate- and high-energy neutrons, high-energy electrons and high-energy pions.
Hold-in, Pull-in and Lock-in Ranges for Phase-locked Loop with Tangential Characteristic of the Phase Detector
2019
In the present paper the phase-locked loop (PLL), an electric circuit widely used in telecommunications and computer architectures is considered. A new modification of the PLL with tangential phase detector characteristic and active proportionally-integrating (PI) filter is introduced. Hold-in, pull-in and lock-in ranges for given circuit are studied rigorously. It is shown that lock-in range of the new PLL model is infinite, compared to the finite lock-in range of the classical PLL. peerReviewed
Efficient techniques for fault detection and location of multiple controlled Toffoli-based reversible circuit
2021
It is very important to detect and correct faults for ensuring the validity and reliability of these circuits. In this regard, a comparative study with related existing techniques is undertaken. Two techniques to achieve the testability of reversible circuits are introduced that have been improved in terms of quantum cost and fault coverage rate. Considering this aspect, the main focus of these techniques is on the efficient detection and location of faults with 100% accuracy. These techniques for fault detection in reversible circuit design, in addition to being able to produce the correct outputs, can also provide information for fault location that has already been done at a higher cost.…