6533b839fe1ef96bd12a6413

RESEARCH PRODUCT

Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems

David De AndrésD. GilP. GilJuan Carlos Ruiz

subject

Very-large-scale integrationEmulationComputer sciencebusiness.industryEmbedded systemControl reconfigurationContext (language use)Transient (computer programming)Hardware_PERFORMANCEANDRELIABILITYFault injectionFault modelFault (power engineering)business

description

Advances in circuitry integration increase the probability of occurrence of transient faults in VLSI systems. A confident use of these systems requires the study of their behaviour in the presence of such faults. This study can be conducted using model-based fault injection techniques. In that context, field-programmable gate arrays (FPGAs) offer a great promise by enabling those techniques to execute models faster. This paper focuses on how run-time reconfiguration techniques can be used for emulating the occurrence of transient faults in VLSI models. Although the use of FPGAs for that purpose has been restricted so far to the well-known bit-flip fault model, recent studies in fault representativeness point out the need of considering a wider set of faults modelling aspects like delays, indeterminations and pulses. Therefore, the main goal of this study is to analyse the different alternatives that FPGAs offer for the emulation of these faults while greatly decreasing the time devoted to models execution

yearjournalcountryeditionlanguage
2006-07-21International Conference on Dependable Systems and Networks (DSN'06)
https://doi.org/10.1109/dsn.2006.62