Search results for "PRNG"

showing 2 items of 2 documents

Random Slicing: Efficient and Scalable Data Placement for Large-Scale Storage Systems

2014

The ever-growing amount of data requires highly scalable storage solutions. The most flexible approach is to use storage pools that can be expanded and scaled down by adding or removing storage devices. To make this approach usable, it is necessary to provide a solution to locate data items in such a dynamic environment. This article presents and evaluates the Random Slicing strategy, which incorporates lessons learned from table-based, rule-based, and pseudo-randomized hashing strategies and is able to provide a simple and efficient strategy that scales up to handle exascale data. Random Slicing keeps a small table with information about previous storage system insert and remove operations…

DesignComputer scienceDistributed computingPerformancestorage managementHash function0102 computer and information sciences02 engineering and technologyParallel computingUSable01 natural sciencesSlicingrandomized data distributionAffordable and Clean Energy0202 electrical engineering electronic engineering information engineeringRandomnessExperimentationscalabilityPseudorandom number generatorbusiness.industry020206 networking & telecommunicationsReliabilityData FormatPRNG010201 computation theory & mathematicsHardware and ArchitectureComputer data storageScalabilityTable (database)businessNetworking & Telecommunications
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Backoff Hardware Architecture for Inter-FPGA Traffic Management

2017

International audience; Multi-FPGA platforms are considered to be the mostappropriate experimental way to emulate a large Multi-ProcessorSystem-on-Chip based on a Network-on-Chip. However, theuse of a Network-on-Chip in several FPGAs requires inter-FPGA communication links to replace intra-FPGA links betweenrouters. As the ratio of the logic capacity to the number of IOsonly increases slowly with each generation of FPGA, IOs inFPGA are becoming a scare resource. And as there are morerouters than IOs, using a Network-on-Chip requires sharinginter-FPGA links between routers, and sharing an external linkcan lead to bottlenecks. Here, we evaluate the inter-FPGA trafficmanagement using a backoff…

Pseudorandom number generatorHardware architecturebusiness.industryComputer science020206 networking & telecommunications02 engineering and technology020202 computer hardware & architecture[INFO.INFO-ES] Computer Science [cs]/Embedded SystemsResource (project management)Network on a chipPRNGEmbedded system0202 electrical engineering electronic engineering information engineeringHardware_INTEGRATEDCIRCUITS[INFO.INFO-ES]Computer Science [cs]/Embedded Systems[ INFO.INFO-ES ] Computer Science [cs]/Embedded SystemsRouting (electronic design automation)ArchitecturebusinessField-programmable gate arrayinter-FPGA linkBackOff architectureNoC
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