Search results for "RDW"

showing 10 items of 1401 documents

Towards the definitive evaluation framework for cross-platform app development approaches

2019

Abstract Mobile app development is hindered by device fragmentation and vendor-specific modifications. Boundaries between devices blur with PC-tablet hybrids on the one side and wearables on the other. Future apps need to support a host of app-enabled devices with differing capabilities, along with their software ecosystems. Prior work on cross-platform app development concerned concepts and prototypes, and compared approaches that target smartphones. To aid choosing an appropriate framework and to support the scientific assessment of approaches, an up-to-date comparison framework is needed. Extending work on a holistic, weighted set of assessment criteria, we propose what could become the …

business.industryComputer science05 social sciencesWearable computer020207 software engineering02 engineering and technologyData scienceVDP::Matematikk og Naturvitenskap: 400::Informasjons- og kommunikasjonsvitenskap: 420Variety (cybernetics)Market fragmentationSoftwareHardware and Architecture0502 economics and businessCross-platform0202 electrical engineering electronic engineering information engineeringWeb applicationbusinessSet (psychology)Host (network)050203 business & managementSoftwareInformation Systems
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Use of H.264 real-time video encoding to reduce display wall system bandwidth consumption

2015

This paper compares the DXT and JPEG image compression techniques used in display wall solutions SAGE and DisplayCluster with hardware accelerated H.264 video encoding that is used in the display wall system developed by the authors of this paper. The obtained processing power usage and generated bandwidth measurements presented in this paper demonstrate that hardware accelerated H.264 encoding offers multiple benefits over software implemented H.264, DXT and JPEG.

business.industryComputer scienceBandwidth (signal processing)ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISIONData_CODINGANDINFORMATIONTHEORYcomputer.file_formatJPEGPower usageReal time videoSoftwareJpeg image compressionbusinesscomputerComputer hardwareTransform codingData compression2015 IEEE 3rd Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)
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Current characterisation for ultra low power wireless body area networks

2010

The emerging area of body area networks (BAN) imposes challenging requirements on hardware and software to achieve the desired lifetimes for certain devices such as long term medical implants. In this paper, we propose a novel approach to the measurement and characterisation of the energy consumption of BAN devices. The approach uses a low cost energy auditing circuit and addresses the problem of accurately measuring low-level current consumption. This new technique will allow precise and analytical measurements of systems and components in terms of energy. This will help circuit designers minimise power consumption in BAN devices. Software engineers might use this approach to validate and …

business.industryComputer scienceBody area networks Body sensor networks Circuits Costs Current measurement Energy consumption Energy measurement Hardware Implants Power engineering and energy Body Area Networks Current characterization Embedded system design Energy efficiency Power Consumption Wireless Network softwareEnergy consumptionPower (physics)SoftwareEmbedded systemCode (cryptography)Electronic engineeringWirelessbusinessEnergy (signal processing)Electronic circuitEfficient energy use2010 8th Workshop on Intelligent Solutions in Embedded Systems
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CMOS Capacitance-to-Time Converter-Based Interface for Differential Capacitive Sensors

2020

This paper presents pre-layout simulation results on a CMOS implementation of a capacitance-to-time converter-based electronic interface for differential capacitive sensors. Its simple architecture, comprising only three operational amplifiers (OA) and a digital mixer (inverted XOR gate) allows, by properly setting the values of seven biasing resistors, to fit the working range anywhere from few fF to hundreds of pF, giving the output quasi-digital signals (T and PW) in the useful μs-ms range (appropriate for direct interfacing with general purposes microcontrollers). A couple of illustrative examples are provided.

business.industryComputer scienceCapacitive sensingElectrical engineeringCapacitancelaw.inventionMicrocontrollerCMOSInterfacinglawHardware_INTEGRATEDCIRCUITSOperational amplifierResistorbusinessXOR gate2020 Global Congress on Electrical Engineering (GC-ElecEng)
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Optimization of a Time-to-Digital Converter and a coincidence map algorithm for TOF-PET applications

2015

This contribution describes the optimization of a multichannel high resolution Time-to-Digital Converter (TDC) in a Field-Programmable Gate Array (FPGA) initially capable of obtaining time resolutions below 100ps for multiple channels. Due to its fast propagation capability it has taken advantage of the FPGA internal carry logic for accurate time measurements. Furthermore, the implementation of the TDC has been performed in different clock regions and tested with different frequencies as well, achieving improvements of up to 50% for a pair of channels. Moreover, since the TDC is potentially going to be used in a trigger system for Positron Emission Tomography (PET), the algorithm for coinci…

business.industryComputer scienceCarry (arithmetic)High resolutionCoincidenceTime-to-digital converterIdentification (information)Hardware and ArchitectureGate arraybusinessDifference-map algorithmField-programmable gate arraySoftwareComputer hardwareJournal of Systems Architecture
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A microcomputer system for controlling classical conditioning experiments

1994

A microcomputer-based laboratory system for controlling stimulus presentations and data acquisition in classical conditioning experiments is described. The system comprises an Intel 386/486-based microcomputer and a commercially obtained low-cost counter/timer board with input/output lines for stimulus timing and external device control. A simple, yet versatile custom-designed structured programming language is provided for performing an unlimited number of stimulus configurations and their sequences. In electrophysiological studies, the system can be flexibly connected to computer-controlled signal conditioning systems for the amplification and filtering of multiunit and evoked field poten…

business.industryComputer scienceClassical conditioningExperimental and Cognitive PsychologyStimulus (physiology)Structured programmingData acquisitionMicrocomputerIntel 80386Psychology (miscellaneous)TimerbusinessSignal conditioningGeneral PsychologyComputer hardwareBehavior Research Methods, Instruments, & Computers
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A reconfigurable architecture for autonomous visual-navigation

2003

This paper describes the design of a reconfigurable architecture for implementing image processing algorithms. This architecture is a pipeline of small identical processing elements that contain a programmable logic device (FPGA) and double port memories. This processing system has been adapted to accelerate the computation of differential algorithms. The log-polar vision selectively reduces the amount of data to be processed and simplifies several vision algorithms, making possible their implementation using few hard-ware resources. The reconfigurable architecture design has been devoted to implementation, and has been employed in an autonomous platform, which has power consumption, size a…

business.industryComputer scienceComputationPipeline (computing)Port (circuit theory)Computer Science ApplicationsProgrammable logic deviceHardware and ArchitectureEmbedded systemDigital image processingPattern recognition (psychology)Computer Vision and Pattern RecognitionArtificial intelligenceArchitecturebusinessField-programmable gate arraySoftwareComputer hardwareMachine Vision and Applications
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Design Space Exploration for a Custom VLIW Architecture: Direct Photo Printer Hardware Setting Using VEX Compiler

2008

Increasingly more computing power is demanded for contemporary applications such as multimedia, 3D visualization, and telecommunication. This paper presents a design space exploration (DSE) experience for an embedded VLIW processor that allows finding out the best architecture for given application. The proposed method has been implemented and tested using an image processing chain for direct photo printer. Our results show a considerable improvement in hardware cost and performance. After the best architecture is identified, we applied a technique to optimize the code in VEX system that uses ?inlining? function in order to reduce execution time.

business.industryComputer scienceDesign space explorationOptimizing compilerImage processingcomputer.software_genreSpace explorationVisualizationInstruction setComputer architectureVery long instruction wordEmbedded systemCompilerbusinesscomputerComputer hardware2008 IEEE International Conference on Signal Image Technology and Internet Based Systems
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Optimizing the Use of an Integrated LMS: Hardware Evolution through Distributed Computing. Experience from the Universitat de València

2009

The advent of the Internet has opened a scope for research in new methods and tools that may facilitate the teaching and learning processes. This has, in turn, led to the development of learning platforms to support teaching and learning activities. Nowadays most universities provide their academic community with some form of a learning management system (LMS). To achieve the optimal use of such type of systems, they must integrate all their academic community and preexisting applications at its institutions. These complex objectives can be reached by using a robust architecture, preferably an open system, based on distributed computing. In this paper, we expose the Universitat de Valencia …

business.industryComputer scienceDistributed computingOpen system (computing)Academic communityLearning ManagementThe InternetArchitecturebusinessComputer hardware
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Pico: A data acquisition program for picosecond laser spectroscopy

1992

Abstract A data acquisition and control program for picosecond pump and probe experiments has been developed. The program PICO is written in C-programming language for maximum efficiency. The software which runs on an IBM PC compatible microcomputer controls a stepper motor driven optical delay, and at the same time collects data from a digital lock-in amplifier. PICO can be used to control any experiment utilizing two-beam pump probe technique. The modular structure of the software allows for easy implementation with different hardware configurations. The program includes: measurement option, manual control of the delay line using a joystick and functions for file retrieval and editing. Ad…

business.industryComputer scienceGeneral Chemical EngineeringAmplifierApplied Microbiology and BiotechnologyData acquisitionSoftwarePicosecondIBM PC compatibleJoystickMicrocomputerLine (text file)businessComputer hardwareBiotechnologyComputers & Chemistry
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