Search results for "RDW"
showing 10 items of 1401 documents
FPGA-based embedded Logic Controllers
2014
In general case, reconfigurable logic controllers (RLC) are included into reactive digital embedded systems, carrying out control for several processes proceeding concurrently. The paper presents a practical application of a formal, rule-based specification language in Gentzen sequent logic, which is used as an intermediate textual description of a control interpreted Petri net. On the other hand exactly the same description serves also as logic design expressions, related with different versions of functionally equivalent concurrent state machine models, considered on Register Transfer Level. The symbolic rule-based specification of Petri net-based embedded Logic Controllers (LCs) can be s…
Heavy ion SEE studies on 4-Gbit NAND-Flash memories
2007
Heavy ion SEE studies on three 4-Gbit NAND-flash memory types were performed at the RADEF facility at the University of Jyvaskyla, Finland with particular emphasis on SEFI differentiation. An error classification for complex memory devices is introduced, and respective cross sections are reported.
A mixed geometric-systolic approach to parallel molecular dynamics simulations
1995
We have developed a flexible and efficient method of performing molecular dynamics simulations on distributed memory parallel computers. The novel feature is to use simultaneously spatial partitioning and systolic loop approaches according to a strategy which, for a given simulation, adapts itself to the multiprocessor system, allowing to approach optimal performance. The method assures high efficiencies even in situations in which, due to the exceeding large number of processors, the usage of a pure spatial decomposition would be impossible. The algorithm provides as particular cases both the pure spatial partitioning and the pure systolic parallelization schemes, so that its adoption assu…
Cryogenic nanoelectromechanical switch enabled by Bi2Se3 nanoribbons
2022
Abstract Nanoelectromechanical (NEM) switches are potential candidates for memory and logic devices for low standby-current and harsh environment applications. Cryogenic operation of these devices would allow to use them, e.g., in space probes and in conjunction with quantum computers. Herein, it is demonstrated that cryogenic application requirements such as good flexibility and conductivity are satisfied by using Bi2Se3 nanoribbons as active elements in NEM switches. Experimental proof of principle NEM switching at temperatures as low as 5 K is achieved in volatile and non-volatile reversible regimes, exhibiting distinct ON and OFF states, backed by theoretical modelling. The results open…
Robust Energy Scheduling in Vehicle-to-Grid Networks
2017
The uncertainties brought by intermittent renewable generation and uncoordinated charging behaviors of EVs pose great challenges to the reliable operation of power systems, which motivates us to explore the integration of robust optimization with energy scheduling in V2G networks. In this article, we first introduce V2G robust energy scheduling problems and review the stateof- the art contributions from the perspectives of renewable energy integration, ancillary service provision, and proactive demand-side participation in the electricity market. Second, for each category of V2G applications, the corresponding problem formulations, robust solution concepts, and design approaches are describ…
Hardware-efficient matrix inversion algorithm for complex adaptive systems
2012
This work shows an FPGA implementation for the matrix inversion algebra operation. Usually, large matrix dimension is required for real-time signal processing applications, especially in case of complex adaptive systems. A hardware efficient matrix inversion procedure is described using QR decomposition of the original matrix and modified Gram-Schmidt method. This works attempts a direct VHDL description using few predefined packages and fixed point arithmetic for better optimization. New proposals for intermediate calculations are described, leading to efficient logic occupation together with better performance and accuracy in the vector space algebra. Results show that, for a relatively s…
Reverse and normal drag along a fault
2005
An analysis of the theoretical displacement field around a single dip-slip fault at depth reveals that normal and reverse fault drag develop by perturbation flow induced by fault slip. We analytically model the heterogeneous part of the instantaneous displacement field of an isolated two-dimensional mode II fault in an infinite, homogeneous elastic body in response to fault slip. Material on both sides of the fault is displaced and ‘opposing circulation cells’ arise on opposite sides of the fault, with displacement magnitudes increasing towards the center of the fault. Both normal and reverse drag can develop at the fault center depending on the angle between the markers and the fault; norm…
Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems
2017
Paper presented at the 2017 IEEE International Symposium on Circuits and Systems (ISCAS), held in Baltimore, MD, USA, on 28-31 May 2017.
A simple procedure to improve the pressure evaluation in hydrodynamic context using the SPH
2009
In literature, it is well know that the Smoothed Particle Hydrodynamics method can be affected by numerical noise on the pressure field when dealing with liquids. This can be highly dangerous when an SPH code is dynamically coupled with a structural solver. In this work a simple procedure is proposed to improve the computation of the pressure distribution in the dynamics of liquids. Such a procedure is based on the use of a density diffusion term in the equation for the mass conservation. This diffusion is a pure numerical effect, similar to the well known artificial viscosity originally proposed in SPH method to smooth out the shock discontinuities. As the artificial viscosity, the density…
Hardware implementation of content based video indexing algorithms
2005
This paper focus on hardware implementation of content based video indexing techniques by using the FPGA technology. We aim to propose hardware modules that can satisfy requirements of constrained applications, such as real time applications and complex applications that can combine a large number of techniques in the same indexing system. We represent tow examples of micro-architectures related to the dominant colors descriptor and the compact color descriptor.