Search results for "War"
showing 10 items of 11970 documents
Electrical Modeling of Monolithically Integrated GMR Based Current Sensors
2018
We report on the electrical compact model, using Verilog-A, of a monolithically integrated giant magnetoresistance (GMR) based electrical current sensors. For this purpose, a specifically designed ASIC (AMS $0.35\mu \mathrm{m}$ technology) has been considered, onto which such sensors have been patterned and fabricated, following a two-steps procedure. This work is focused on the DC regime model extraction, giving evidences of its good performance and stating the bases for subsequent model improvements.
Analysis of thin high-k and silicide films by means of heavy ion time-of-flight forward-scattering spectrometry
2006
The use of forward scattered heavy incident ions in combination with a time-of-flight-energy telescope provides a powerful tool for the analysis of very thin (5–30 nm) films. This is because of greater stopping powers and better detector energy resolution for heavier ions than in conventional He-RBS. Because of the forward scattering angle, the sensitivity is greatly enhanced, thus reducing the ion beam induced desorption during the analysis of very thin films. The drawback of forward scattering angle is the limited mass separation for target elements. We demonstrate the performance of the technique with the analysis of 25 nm thick NiSi films and atomic layer deposited 6 nm thick HfxSiyOz f…
Identification of parameters and harmonic losses of a deep-bar induction motor
2017
High frequency harmonics from a frequency converter causes additional losses in a deep-bar induction motor. The harmonics have their own amplitude and phase with respect to the fundamental signal, but the harmonic loss is only dependent on the amplitude of harmonics. A deep-bar induction motor can be modelled by a triple-cage circuit to take skin effect into account. The triple cage circuit having many parameters could be estimated from a small-signal model of the machine by using Differential Evolution. The correctly estimated parameters make the triple-cage circuit valid in a wide range of frequencies. However, the triple-cage circuit is very complicated which makes it difficult to model …
Synchronous precessional motion of multiple domain in a ferromagnetic nanowire by perpendicular field pulses
2014
Magnetic storage and logic devices based on magnetic domain wall motion rely on the precise and synchronous displacement of multiple domain walls. The conventional approach using magnetic fields does not allow for the synchronous motion of multiple domains. As an alternative method, synchronous current-induced domain wall motion was studied, but the required high-current densities prevent widespread use in devices. Here we demonstrate a radically different approach: we use out-of-plane magnetic field pulses to move in-plane domains, thus combining field-induced magnetization dynamics with the ability to move neighbouring domain walls in the same direction. Micromagnetic simulations suggest …
Online Management of Hybrid DRAM-NVMM Memory for HPC
2019
Non-volatile main memories (NVMMs) offer a comparable performance to DRAM, while requiring lower static power consumption and enabling higher densities. NVMM therefore can provide opportunities for improving both energy efficiency and costs of main memory. Previous hybrid main memory management approaches for HPC either do not consider the unique characteristics of NVMMs, depend on high profiling costs, or need source code modifications. In this paper, we investigate HPC applications' behaviors in the presence of NVMM as part of the main memory. By performing a comprehensive study of HPC applications and based on several key observations, we propose an online hybrid memory architecture for …
An Energy Saving Mechanism Based on Vacation Queuing Theory in Data Center Networks
2018
To satisfy the growing need for computing resources, data centers consume a huge amount of power which raises serious concerns regarding the scale of the energy consumption and wastage. One of the important reasons for such energy wastage relates to the redundancies. Redundancies are defined as the backup routing paths and unneeded active ports implemented for the sake of load balancing and fault tolerance. The energy loss may also be caused by the random nature of incoming packets forcing nodes to stay powered on all the times to await for incoming tasks. This paper proposes a re-architecturing of network devices to address energy wastage issue by consolidating the traffic arriving from di…
A Novel Fault-Tolerant Routing Algorithm for Mesh-of-Tree Based Network-on-Chips
2019
Use of bus architecture based communication with increasing processing elements in System-on-Chip (SoC) leads to severe degradation of performance and speed of the system. This bottleneck is overcome with the introduction of Network-on-Chips (NoCs). NoCs assist in communication between cores on a single chip using router based packet switching technique. Due to miniaturization, NoCs like every Integrated circuit is prone to different kinds of faults which can be transient, intermittent or permanent. A fault in any one component of such a crucial network can degrade performance leaving other components non-usable. This paper presents a novel Fault-Tolerant routing Algorithm for Mesh-of-Tree …
Silicon dosimeters based on Floating Gate Sensor: design, implementation and characterization
2020
A rad-hard monolithic dosimeter has been implemented and characterized in a standard 180 nm CMOS technology. The radiation sensor (C-sensor) is based on a Floating Gate (FG) MOS discharge principle. The output current is processed by a current-to-voltage (I/V) interface and then converted by a 5-bit flash ADC. The dosimeter is re-usable (FG can be recharged) and can detect a dose up to 1krad (Si) with a resolution of 30rad (Si) typical over temperature 0 to 85°C range. The ADC allows easy further signal processing for calibration and averaging, etc. The power consumption of C-sensor plus I/V interface is < 2mW from a 5 V power supply. The overall layout area is less than 0.25mm2. The Rad…
Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing
2010
The high-performance computing domain is enriching with the inclusion of Networks-on-chip (NoCs) as a key component of many-core (CMPs or MPSoCs) architectures. NoCs face the communication scalability challenge while meeting tight power, area and latency constraints. Designers must address new challenges that were not present before. Defective components, the enhancement of application-level parallelism or power-aware techniques may break topology regularity, thus, efficient routing becomes a challenge.In this paper, uLBDR (Universal Logic-Based Distributed Routing) is proposed as an efficient logic-based mechanism that adapts to any irregular topology derived from 2D meshes, being an alter…
Towards Open Domain Chatbots—A GRU Architecture for Data Driven Conversations
2018
Understanding of textual content, such as topic and intent recognition, is a critical part of chatbots, allowing the chatbot to provide relevant responses. Although successful in several narrow domains, the potential diversity of content in broader and more open domains renders traditional pattern recognition techniques inaccurate. In this paper, we propose a novel deep learning architecture for content recognition that consists of multiple levels of gated recurrent units (GRUs). The architecture is designed to capture complex sentence structure at multiple levels of abstraction, seeking content recognition for very wide domains, through a distributed scalable representation of content. To …