Search results for "circuits"

showing 10 items of 358 documents

A delay model valid in all the regions of operation of the MOS transistor for the energy-efficient design of MCML gates

2013

This paper presents a novel delay model for MCML circuits valid in all the regions of operation of the MOS transistor, i.e., weak inversion (sub-threshold), moderate inversion (near-threshold) and strong inversion. The proposed delay model was employed to develop an automated methodology for the energy-efficient design of such circuits. The tradeoff that can be realized between energy and delay was investigated. Experiments were performed using different technologies to understand the impact of technology scaling on that tradeoff too. Major results of this study are as follows. In a circuit designed for minimum energy consumption, the minimum energy point occurs in the near-threshold region…

lawTransistorElectronic engineeringcircuits energy-efficient design inversion coefficient near-threshold region energy-efficient curveElectrical and Electronic EngineeringCondensed Matter PhysicsSettore ING-INF/01 - ElettronicaElectronic Optical and Magnetic MaterialsEfficient energy uselaw.inventionMathematics
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Plasmonic Stripes in Aqueous Environment Co-Integrated With Si3N4 Photonics

2018

We demonstrate the design, fabrication, and the experimental characterization of gold-based plasmonic stripes butt-coupled with low-pressure-chemical-vapor-deposition (LPCVD)-based Si3N4 waveguides for the excitation of surface-plasmon-polariton (SPP) modes in aqueous environment. Plasmonic gold stripes, in aqueous environment, with cross-sectional dimensions of 100 nm × 7 μm were interfaced with 360 nm × 800 nm Si3N4 waveguides cladded with low-temperature-oxide, exploiting linear photonic tapers with appropriate vertical (VO) and longitudinal (LO) offsets between the plasmonic and photonic waveguide facets. An interface insertion loss of 2.3 ± 0.3 dB and a plas…

lcsh:Applied optics. PhotonicsFabricationMaterials science02 engineering and technologyChemical vapor deposition01 natural sciencesplasmonicslaw.inventionPhotonic integrated circuits010309 opticslawplasmonic waveguide.0103 physical sciencesInsertion losslcsh:QC350-467Electrical and Electronic EngineeringPlasmonAqueous solutionbusiness.industrysurface plasmonslcsh:TA1501-1820021001 nanoscience & nanotechnologyAtomic and Molecular Physics and OpticsOptoelectronicsPhotonics0210 nano-technologybusinessWaveguideExcitationlcsh:Optics. Lightbutt-coupled interfaceIEEE Photonics Journal
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Output Impedance Improvement Using Coupled Inductors

2017

When using a single DC/DC converter with multiple outputs and having a buck topology, which has one filter inductor per output, the designer can choose to couple these outputs together. This paper demonstrates additional benefits of coupling output inductors together. Apart from saving mass and volume, and due to an improved small signal behaviour it also reduces the output impedance of the regulated output. The paper will analyse a seven output push-pull converter used as a space power converter module and verify the theoretical results with experimental measurements.

lcsh:GE1-350Forward converterEngineering0-10 V lighting controlbusiness.industryoutput impedancecoupled inductorspeak current controlĆuk convertersmall signal analysisTopology (electrical circuits)InductorFilter (video)Boost converterElectronic engineeringOutput impedancebusinesslcsh:Environmental sciencesE3S Web of Conferences
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Dades per a l'anàlisi de narratives per al lector infantil i juvenil

2009

El camp de la literatura per a infants i joves reclama habitualment dades objectives que permeten avaluar el tipus de relat amb el qual ha de treballar l’editor, el traductor, el bibliotecari, el gestor cultural o el professional de la mediació. Per tant, la transformació d’un relat en objecte epistemològic és el primer esglaó imprescindible per als professionals de la mediació o de la gestió cultural. L’article proposa un protocol per a l’anàlisi dels relats per a infants i joves

lcsh:Language and LiteratureUNESCO::CIENCIAS DE LAS ARTES Y LAS LETRASLiteratura CatalanaLingüísticaanàlisi narratològica; narracions infantils i juvenils; circuits literaris; paratextosFilologíasUNESCO::CIENCIAS DE LAS ARTES Y LAS LETRAS::Teoría análisis y crítica literariasAnàlisi del discurscircuits literarislcsh:Philology. Linguisticslcsh:P1-1091:CIENCIAS DE LAS ARTES Y LAS LETRAS [UNESCO]lcsh:Panàlisi narratològicaparatextosLiteratura per a Infants i Jovesnarracions infantils i juvenils
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Hold-in, Pull-in and Lock-in Ranges for Phase-locked Loop with Tangential Characteristic of the Phase Detector

2019

In the present paper the phase-locked loop (PLL), an electric circuit widely used in telecommunications and computer architectures is considered. A new modification of the PLL with tangential phase detector characteristic and active proportionally-integrating (PI) filter is introduced. Hold-in, pull-in and lock-in ranges for given circuit are studied rigorously. It is shown that lock-in range of the new PLL model is infinite, compared to the finite lock-in range of the classical PLL. peerReviewed

lock-in rangephase-locked loopelektroniset piiritHardware_INTEGRATEDCIRCUITSnonlinear analysispull-in rangeHardware_PERFORMANCEANDRELIABILITYcapture rangematemaattiset mallithold-in rangeHardware_LOGICDESIGN
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Design and simulation of QCA-based 3-bit binary to gray and vice versa code converter in reversible and non-reversible mode

2022

The current Very Large-Scale Integration (VLSI) technology has reached its peak due to the fundamental physical limits of Complementary Metal-Oxide-Semiconductor (CMOS). Quantum-dot Cellular Automata (QCA) is considered a proper alternative to CMOS technology in digital circuit design. QCA has features like low power, small area, and high speed in nanoscale digital circuit design. A code converter is a circuit that converts a determined code to another one. Code converters such as Binary to Gray, Gray to Binary, and Binary to BCD converters have a crucial role in fast signal processing in digital systems. Also, code converters are used as a base unit for data transmission into the Arithmeti…

logiikkaohjelmointibinary to graykvanttitietokoneetHardware_INTEGRATEDCIRCUITSsoluautomaatitQuantum computingreversible logickvanttilaskentaElectrical and Electronic Engineeringquantum-dot cellular automatagray to binaryAtomic and Molecular Physics and OpticsElectronic Optical and Magnetic MaterialsOptik
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Sentinel lymph node BIOPSY after neoadjuvant therapy in breast cancer patients with lymph node involvement at diagnosis. Could wire localization of c…

2021

Abstract Introduction Sentinel lymph node biopsy (SLNB) after neoadjuvant therapy (NAT) in node-positive (N+) breast cancer patients at diagnosis remains a controversial issue, with no consensus on implementation or safety. Objectives We sought to assess the accuracy of SLNB after NAT in biopsy-proven N+ cases at diagnosis and the efficacy and accuracy of wire localization of the clipped node to improve results. Material and methods A cross-sectional diagnostic technique validation study in N+ patients following NAT was performed. The biopsy-proven affected lymph node was clipped at diagnosis. SLNB and axillary lymph node dissection (ALND) were performed in cases of clinical-radiological ly…

medicine.medical_specialtymedicine.medical_treatmentWire localizationSentinel lymph nodeBreast Neoplasms03 medical and health sciences0302 clinical medicineBreast cancerBiopsymedicineHumans030212 general & internal medicineLymph nodeNeoadjuvant therapyNeoplasm Stagingmedicine.diagnostic_testbusiness.industrySentinel Lymph Node BiopsyAxillary Lymph Node DissectionMiddle Agedmedicine.diseaseSurgical InstrumentsNeoadjuvant Therapymedicine.anatomical_structureCross-Sectional Studies030220 oncology & carcinogenesisLymphatic MetastasisAxillaLymph Node ExcisionSurgeryNode (circuits)FemaleRadiologyLymph NodesSentinel Lymph NodebusinessThe surgeon : journal of the Royal Colleges of Surgeons of Edinburgh and Ireland
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Single Event Transients and Pulse Quenching Effects in Bandgap Reference Topologies for Space Applications

2016

An architectural performance comparison of bandgap voltage reference variants, designed in a $0.18~\mu \text {m}$ CMOS process, is performed with respect to single event transients. These are commonly induced in microelectronics in the space radiation environment. Heavy ion tests (Silicon, Krypton, Xenon) are used to explore the analog single-event transients and have revealed pulse quenching mechanisms in analogue circuits. The different topologies are compared, in terms of cross-section, pulse duration and pulse amplitude. The measured results, and the explanations behind the findings, reveal important guidelines for designing analog integrated circuits, which are intended for space appli…

mikroelektroniikkaNuclear and High Energy PhysicsBandgap voltage referencecircuit topologysingle-event transient (SET)Integrated circuit01 natural scienceslaw.inventionsingle event transientsCurrent mirrorlawpulse quenchingsingle-event effects (SEE)ionizationradiation hardening by design (RHBD)0103 physical sciencesElectronic engineeringMicroelectronicsAnalog single-event transient (ASET); bandgap voltage reference (BGR); charge sharing; CMOS analog integrated circuits; heavy ion; ionization; parasitic bipolar effect; pulse quenching; radiation effects; radiation hardening by design (RHBD); reference circuits; single-event effects (SEE); single-event transient (SET); space electronics; Voltage reference; Nuclear and High Energy Physics; Nuclear Energy and Engineering; Electrical and Electronic EngineeringAnalog single-event transient (ASET)Electrical and Electronic Engineeringparasitic bipolar effectreference voltage010302 applied physicsPhysicsbandgap voltage reference (BGR)charge sharingta114ta213010308 nuclear & particles physicsbusiness.industryanalog integrated circuitsTransistorspace electronicsPulse durationheavy ionPulse (physics)Voltage referenceNuclear Energy and EngineeringPulse-amplitude modulationreference circuitsmicroelectronicsradiation effectsspace applicationsOptoelectronicsbusinessCMOS analog integrated circuitsIEEE Transactions on Nuclear Science
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Min-Type Control Strategy of a DC-DC Synchronous Boost Converter

2019

International audience; This paper presents the analysis and design of a min-type strategy to control a synchronous boost converter in continuous conduction mode. The strategy uses a nonlinear switching surface to establish the change of topology in the converter and is analyzed by means of a sliding-mode control approach. Subsequently, the min-type strategy is modified by a hybrid control formulation, which introduces a hysteresis width and a dwell-time to obtain a finite switching frequency in the start-up and steady-state respectively. The hybrid control formulation is implemented digitally by means of a microprocessor which processes the samples of inductor current and capacitor voltage…

min-type controlstart-upComputer scienceTopology (electrical circuits)02 engineering and technologyInductorSliding mode controllaw.inventionSettore ING-INF/04 - AutomaticaControl theorylaw[INFO.INFO-AU]Computer Science [cs]/Automatic Control Engineering0202 electrical engineering electronic engineering information engineeringElectrical and Electronic EngineeringIndex Terms-Synchronous boost converterSynchronous boost converter020208 electrical & electronic engineeringhybrid controlPower (physics)HysteresisMicroprocessorNonlinear systemsliding-mode controlControl and Systems EngineeringCapacitor voltagesliding-mode control (SMC)Boost converterTransient (oscillation)
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Mise en œuvre d’une architecture de gestion de collision pour le déploiement efficace d’un NoC sur multi-FPGA

2015

International audience; Le déploiement d’un NoC (Network On Chip) sur plusieurs FPGA nécessite que des routeurs partagent un même lien de communication entre FPGAs, créant des goulots d’étranglement [1]. Dans ce papier, nous proposons une structure de gestion de collision intégrée entre le NoC et le point d’accès du protocole FPGA. Cette structure est basée sur les algorithmes utilisés dans les réseaux informatiques et adaptée aux NoC [2].

multi-FPGAHardware_INTEGRATEDCIRCUITS[INFO.INFO-ES]Computer Science [cs]/Embedded Systems[ INFO.INFO-ES ] Computer Science [cs]/Embedded Systemsgestion de collisionsalgorithme de BackoffNoC[INFO.INFO-ES] Computer Science [cs]/Embedded Systems
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